Combined CVS commit logs for the files of the Elphel projects .
Updated: 28 min 21 sec ago
[fpga] By elphel: modified to match new compressor_one.v
elphel committed changes to the Elphel project fpga CVS:
modified to match new compressor_one.v
modified to match new compressor_one.v
- Modified compressor_one.tf rev1.2 - added 176 lines, removed 99 lines
[fpga] By elphel: included map table that stores 2 bits per 2x2 macroblocks (32x32 pixels) - skip (not code) and quality - one of two alternative table sets available in the same frame.
elphel committed changes to the Elphel project fpga CVS:
included map table that stores 2 bits per 2x2 macroblocks (32x32 pixels) - skip (not code) and quality - one of two alternative table sets available in the same frame.
included map table that stores 2 bits per 2x2 macroblocks (32x32 pixels) - skip (not code) and quality - one of two alternative table sets available in the same frame.
- Modified compressor_one.v rev1.2 - added 118 lines, removed 24 lines
[fpga] By elphel: Added more bits to the table address to be able to put more table in the same address space
elphel committed changes to the Elphel project fpga CVS:
Added more bits to the table address to be able to put more table in the same address space
Added more bits to the table address to be able to put more table in the same address space
- Modified qdeq.v rev1.4 - added 7 lines, removed 5 lines
[fpga] By elphel: error in comment fixed
elphel committed changes to the Elphel project fpga CVS:
error in comment fixed
error in comment fixed
- Modified qdeq.v rev1.3 - added one line, removed one line
[fpga] By elphel: copyright update, comments clean up
elphel committed changes to the Elphel project fpga CVS:
copyright update, comments clean up
copyright update, comments clean up
- Modified mcontr_frame_rd.v rev1.2 - added 2 lines, removed 4 lines
- Modified mcontr_frame_wr.v rev1.2 - added one line, removed one line
[fpga] By elphel: bug fix, and addition of the pre2_fo output (2 cycles ahead of the data out)
elphel committed changes to the Elphel project fpga CVS:
bug fix, and addition of the pre2_fo output (2 cycles ahead of the data out)
bug fix, and addition of the pre2_fo output (2 cycles ahead of the data out)
- Modified idct_2d.v rev1.4 - added 8 lines, removed 3 lines
[fpga] By elphel: some commented out lines removed
elphel committed changes to the Elphel project fpga CVS:
some commented out lines removed
some commented out lines removed
- Modified fdct_2d.v rev1.3 - added 2 lines, removed 2 lines
[fpga] By elphel: Minor bug fix (bug revealed itself during synthesis)
elphel committed changes to the Elphel project fpga CVS:
Minor bug fix (bug revealed itself during synthesis)
Minor bug fix (bug revealed itself during synthesis)
- Modified encode_dct.v rev1.3 - added 3 lines, removed one line
[fpga] By elphel: comment error fixed
elphel committed changes to the Elphel project fpga CVS:
comment error fixed
comment error fixed
- Modified dc_predict.v rev1.2 - added none, removed one line
[fpga] By elphel: Test fixture for compressor_one.v
elphel committed changes to the Elphel project fpga CVS:
Test fixture for compressor_one.v
Test fixture for compressor_one.v
- Modified compressor_one.tf rev1.1 - added none, removed none
[fpga] By elphel: Initial release of the module that combines DCT, quantizer, dequantizer, IDCT, reference frame bypass and adder/subtracter, "pre-token" encoder.
elphel committed changes to the Elphel project fpga CVS:
Initial release of the module that combines DCT, quantizer, dequantizer, IDCT, reference frame bypass and adder/subtracter, "pre-token" encoder.
Initial release of the module that combines DCT, quantizer, dequantizer, IDCT, reference frame bypass and adder/subtracter, "pre-token" encoder.
- Modified compressor_one.v rev1.1 - added none, removed none
[fpga] By elphel: test data for simulation
elphel committed changes to the Elphel project fpga CVS:
test data for simulation
test data for simulation
- Modified block8x8.dat rev1.1 - added none, removed none
[fpga] By elphel: Initial release of the DC predictor module
elphel committed changes to the Elphel project fpga CVS:
Initial release of the DC predictor module
Initial release of the DC predictor module
- Modified dc_predict.v rev1.1 - added none, removed none
- Modified dc_predict_calc.v rev1.1 - added none, removed none
[fpga] By elphel: modified to support simulating of the non-coded blocks
elphel committed changes to the Elphel project fpga CVS:
modified to support simulating of the non-coded blocks
modified to support simulating of the non-coded blocks
- Modified test_encode_dct.tf rev1.2 - added 10 lines, removed 9 lines
[fpga] By elphel: added processing of non-coded blocks
elphel committed changes to the Elphel project fpga CVS:
added processing of non-coded blocks
added processing of non-coded blocks
- Modified qdeq.v rev1.2 - added 23 lines, removed 16 lines
[fpga] By elphel: fixed some comments, changed copyright
elphel committed changes to the Elphel project fpga CVS:
fixed some comments, changed copyright
fixed some comments, changed copyright
- Modified mcontr_tok_wr.v rev1.2 - added 3 lines, removed 3 lines
[fpga] By elphel: Added "skip" input for uncoded blocks. When active it preserves timing (and provides output synchronization) but reduces power consumption by not running most of the registers and counters.
elphel committed changes to the Elphel project fpga CVS:
Added "skip" input for uncoded blocks. When active it preserves timing (and provides output synchronization) but reduces power consumption by not running most of the registers and counters.
Added "skip" input for uncoded blocks. When active it preserves timing (and provides output synchronization) but reduces power consumption by not running most of the registers and counters.
- Modified fdct_1d.v rev1.3 - added 33 lines, removed 20 lines
- Modified fdct_2d.v rev1.2 - added 24 lines, removed 6 lines
- Modified idct_1d.v rev1.4 - added 20 lines, removed 11 lines
- Modified idct_2d.v rev1.3 - added 33 lines, removed 25 lines
[fpga] By elphel: added more modules to simulate together
elphel committed changes to the Elphel project fpga CVS:
added more modules to simulate together
added more modules to simulate together
- Modified dct_quant.tf rev1.2 - added 241 lines, removed 120 lines
[fpga] By elphel: added processing of the non-coded blocks (input data is 11'h400)
elphel committed changes to the Elphel project fpga CVS:
added processing of the non-coded blocks (input data is 11'h400)
added processing of the non-coded blocks (input data is 11'h400)
- Modified encode_dct.v rev1.2 - added 23 lines, removed 22 lines
[fpga] By elphel: initial release of quantizer/dequantizer
elphel committed changes to the Elphel project fpga CVS:
initial release of quantizer/dequantizer
initial release of quantizer/dequantizer
- Modified dct_quant.tf rev1.1 - added none, removed none
- Modified qdeq.v rev1.1 - added none, removed none