[fpga] By elphel: modified to support simulating of the non-coded blocks
elphel committed changes to the Elphel project fpga CVS:
modified to support simulating of the non-coded blocks
modified to support simulating of the non-coded blocks
- Modified test_encode_dct.tf rev1.2 - added 10 lines, removed 9 lines
[fpga] By elphel: added processing of non-coded blocks
elphel committed changes to the Elphel project fpga CVS:
added processing of non-coded blocks
added processing of non-coded blocks
- Modified qdeq.v rev1.2 - added 23 lines, removed 16 lines
[fpga] By elphel: fixed some comments, changed copyright
elphel committed changes to the Elphel project fpga CVS:
fixed some comments, changed copyright
fixed some comments, changed copyright
- Modified mcontr_tok_wr.v rev1.2 - added 3 lines, removed 3 lines
[fpga] By elphel: Added "skip" input for uncoded blocks. When active it preserves timing (and provides output synchronization) but reduces power consumption by not running most of the registers and counters.
elphel committed changes to the Elphel project fpga CVS:
Added "skip" input for uncoded blocks. When active it preserves timing (and provides output synchronization) but reduces power consumption by not running most of the registers and counters.
Added "skip" input for uncoded blocks. When active it preserves timing (and provides output synchronization) but reduces power consumption by not running most of the registers and counters.
- Modified fdct_1d.v rev1.3 - added 33 lines, removed 20 lines
- Modified fdct_2d.v rev1.2 - added 24 lines, removed 6 lines
- Modified idct_1d.v rev1.4 - added 20 lines, removed 11 lines
- Modified idct_2d.v rev1.3 - added 33 lines, removed 25 lines
[fpga] By elphel: added more modules to simulate together
elphel committed changes to the Elphel project fpga CVS:
added more modules to simulate together
added more modules to simulate together
- Modified dct_quant.tf rev1.2 - added 241 lines, removed 120 lines
[fpga] By elphel: added processing of the non-coded blocks (input data is 11'h400)
elphel committed changes to the Elphel project fpga CVS:
added processing of the non-coded blocks (input data is 11'h400)
added processing of the non-coded blocks (input data is 11'h400)
- Modified encode_dct.v rev1.2 - added 23 lines, removed 22 lines
[fpga] By elphel: initial release of quantizer/dequantizer
elphel committed changes to the Elphel project fpga CVS:
initial release of quantizer/dequantizer
initial release of quantizer/dequantizer
- Modified dct_quant.tf rev1.1 - added none, removed none
- Modified qdeq.v rev1.1 - added none, removed none
[fpga] By elphel: added synchronization requirements/means of the input data
elphel committed changes to the Elphel project fpga CVS:
added synchronization requirements/means of the input data
added synchronization requirements/means of the input data
- Modified idct.tf rev1.2 - added 14 lines, removed one line
[fpga] By elphel: cleaned up, added resource usage statistics
elphel committed changes to the Elphel project fpga CVS:
cleaned up, added resource usage statistics
cleaned up, added resource usage statistics
- Modified idct_2d.v rev1.2 - added 34 lines, removed 44 lines
[fpga] By elphel: note about synchronization of the input data
elphel committed changes to the Elphel project fpga CVS:
note about synchronization of the input data
note about synchronization of the input data
- Modified fdct_1d.v rev1.2 - added 9 lines, removed none
[fpga] By elphel: original release
elphel committed changes to the Elphel project fpga CVS:
original release
original release
- Modified fdct.tf rev1.1 - added none, removed none
- Modified fdct_2d.v rev1.1 - added none, removed none
[fpga] By elphel: First version of forward DCT following algorithm suggested in Theora specs.
elphel committed changes to the Elphel project fpga CVS:
First version of forward DCT following algorithm suggested in Theora specs.
First version of forward DCT following algorithm suggested in Theora specs.
- Modified fdct_1d.v rev1.1 - added none, removed none
[fpga] By elphel: changed copyright, renamed variables
elphel committed changes to the Elphel project fpga CVS:
changed copyright, renamed variables
changed copyright, renamed variables
- Modified idct_1d.v rev1.3 - added 13 lines, removed 13 lines
[fpga] By elphel: Initial rev. of 2-D inverse DCT
elphel committed changes to the Elphel project fpga CVS:
Initial rev. of 2-D inverse DCT
Initial rev. of 2-D inverse DCT
- Modified idct.tf rev1.1 - added none, removed none
- Modified idct_2d.v rev1.1 - added none, removed none
[fpga] By elphel: Fixed some bugs during simulation
elphel committed changes to the Elphel project fpga CVS:
Fixed some bugs during simulation
Fixed some bugs during simulation
- Modified idct_1d.v rev1.2 - added 97 lines, removed 97 lines
[fpga] By elphel: First version of 1d idct designed to Theora specs. Uses 1 multiplier and 250 slices, can run at 13 ns/pixel (6.5ns/clock_period) that should be twice the pixel rate.
elphel committed changes to the Elphel project fpga CVS:
First version of 1d idct designed to Theora specs. Uses 1 multiplier and 250 slices, can run at 13 ns/pixel (6.5ns/clock_period) that should be twice the pixel rate.
First version of 1d idct designed to Theora specs. Uses 1 multiplier and 250 slices, can run at 13 ns/pixel (6.5ns/clock_period) that should be twice the pixel rate.
- Modified idct_1d.v rev1.1 - added none, removed none
[fpga] By elphel: initial version
elphel committed changes to the Elphel project fpga CVS:
initial version
initial version
- Modified encode_dct.v rev1.1 - added none, removed none
- Modified test_encode_dct.tf rev1.1 - added none, removed none
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