AndreyFilippov committed changes to the Elphel git project :
implemented parameter REGB = 2 in infer mode

AndreyFilippov committed changes to the Elphel git project :
included system_defines.vh

AndreyFilippov committed changes to the Elphel git project :
simulation for last commit

AndreyFilippov committed changes to the Elphel git project :
completed Bayer MCLT (some cleanup and more testing is needed)

AndreyFilippov committed changes to the Elphel git project :
working more on Bayer version of the MCLT

Oleg Dzhimiev committed changes to the Elphel git project :
merged

Oleg Dzhimiev committed changes to the Elphel git project :
Merge branch 'master' of https://git.elphel.com/Elphel/linux-elphel

Oleg Dzhimiev committed changes to the Elphel git project :
+ macro to read device name

AndreyFilippov committed changes to the Elphel git project :
Working on MCLT version for Bayer data, exploiting symmetry of DTT of checker board data (half zeros)

AndreyFilippov committed changes to the Elphel git project :
Added code to compare to FPGA

AndreyFilippov committed changes to the Elphel git project :
previous changes, not committed before

Oleg Dzhimiev committed changes to the Elphel git project :
updated. rocko - py 3.5.2, jethro - py 2.7.12

AndreyFilippov committed changes to the Elphel git project :
Bug fixing while comparing special cases

AndreyFilippov committed changes to the Elphel git project :
more data for comparison

We have updated the Yocto build system to Poky Rocko released back in October. Here’s a short summary table of the updates:

before after Poky 2.0 (Jethro) 2.4 (Rocko) gcc 5.3.0 7.2.0 linux kernel 4.0 4.9

Other packages got updates as well:

• apache2-2.4.18 => apache2-2.4.29
• php-5.6.16 => php-5.6.31
• udev-182 changed to eudev-3.2.2, etc.

This new version is in the rocko branch for now but will be merged into master after some transition period (and the current master will be moved to jethro branch). Below are a few tips for future updates.

Poky

It was relatively simple to update the recipes and build the images. Most of the packages were updated to newer versions. One noticeable change is tmp/sysroots/ is not a common location anymore – instead there is the recipe-sysroot/ directory in each recipe’s build directory. Also, our headers didn’t get to the sysroots which got fixed by having:
sysroot_stage_all_append() {
    sysroot_stage_dir ${WORKDIR}/headers/include ${SYSROOT_DESTDIR}/usr/include-uapi
}
We had this task in Jethro but there was another variable used ${STAGING_DIR_TARGET} (instead of ${SYSROOT_DESTDIR})

Linux kernel

It took most of the time to update it.

Luckily our drivers didn’t break but there were a few problems:
 

    1. Serial output

First, we merged our drivers and patches to make the kernel get built at least. After building the kernel the serial output didn’t work – the fix was to switch to earlycon in bootargs in the device tree (in 4.0 ealyprintk still worked):
before:
chosen {
  bootargs = "cma=128M console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootwait rootfstype=ext4";
  linux,stdout-path = "/amba@0/serial@e0000000";
};
after:
chosen {
  bootargs = "earlycon cma=128M root=/dev/mmcblk0p2 rw rootwait rootfstype=ext4";
  stdout-path = "serial0:115200n8";
};
 

    2. Ethernet

Next, there was no ethernet. After some time of debugging the problem was with the device tree again:
before:
phy3: phy@3 {
  compatible = "atheros,8035";
  device_type = "ethernet-phy";
  reg = <0x3>;
};
after:
phy3: phy@3 {
  /* Atheros 8035 */
  compatible = "ethernet-phy-id004d.d072";
  /* compatible = "ethernet-phy-ieee802.3-c22";*/
  device_type = "ethernet-phy";
  reg = <0x3>;
};
The compatible field has to be in a certain format. See the docs.
The next thing has Xilinx switched from xlnx,ps7-ethernet-1.00.a to cdns,zynq-gem (see arch/arm/boot/dts/zynq-7000.dtsi). Didn’t track when – both drivers work. The cdns,zynq-gem is in the mainline, the other is not.
And the last change to the ethernet driver was adding the fixup for Atheros 8035, the network chip we use.
 

    3. Bitstream

Then the bitstream wouldn’t get programmed. It was Xilinx’s problem – new gcc was opting away some of the variables (dma_done) in the driver – they fixed the kernel but didn’t change the hash of the linux-xlnx in the recipe yet (linux-xlnx_2017.3.bb). So, it’s probably coming to 2017.4.
 

    4. Other minor things

Xilinx has changed some of its default config variables and in 4.9 there are a few new dependencies here and there.
The changes made to our config (elphel393.cfg) which is added to the default config for zynq devices:
# This option is for FPGA part
CONFIG_XILINX_DEVCFG=y
# prints time before messages
CONFIG_PRINTK_TIME=y
# dependency for DYNAMIC_DEBUG=y
CONFIG_DEBUG_FS=y
# turned off because old:
CONFIG_XILINX_PS_EMAC=n
CONFIG_XILINX_EMACLITE=n
CONFIG_XILINX_AXI_EMAC=n

 

Applications

udev package switched from udev-182 changed to eudev-3.2.2. udev-182 can copy static device files from /lib/udev/devices/, eudev-3.2.2 does not do this – created a new rule:
ACTION=="add", RUN+="/usr/bin/rsync -a /lib/udev/devices/ /dev/"
This rule adds up ~6 secs to boot time for some reason vs almost nothing if run from the camera init script init_elphel393.py
 

Other notes

• Reminder: the system boots into initramfs first and runs init built by initramfs-live-boot. The script runs switch_root in the end. udev daemon gets killed and restarted

AndreyFilippov committed changes to the Elphel git project :
renamed data file

AndreyFilippov committed changes to the Elphel git project :
Compared through all srages, including phase rotator/fractional pixel shift

AndreyFilippov committed changes to the Elphel git project :
removed unneeded register bits

AndreyFilippov committed changes to the Elphel git project :
more debugging

AndreyFilippov committed changes to the Elphel git project :
rotated data to compare