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The [https://sourceforge.net/p/elphel/linux-elphel/ci/master/tree/drivers/misc/si5338.c drivers/misc/si5338.c] driver allows real-time control of the [http://www.silabs.com/products/clocksoscillators/clock-generator/Pages/differential-lvcmos-clocks.aspx Silicon Labs si5338 Clock Generator] using Linux sysfs interface. It also allows setting up parameters using the Device Tree.

It is also possible to use the register map file generated by Silicon Labs software, converted by a Python [https://sourceforge.net/p/elphel/linux-elphel/ci/master/tree/helpers/si5338_register_map_dts.py script] to a Device Tree fragment (or fed to the driver using sysfs interface).

==Reference Documentation==
This driver is developed using excellent documentation provided by the chip manufacturer:
[http://www.silabs.com/Support%20Documents/TechnicalDocs/Si5338-RM.pdf] - detailed description of the device registers
[http://www.silabs.com/Support%20Documents/TechnicalDocs/Si5338.pdf] - overall chip documentation including configuration procedure
==sysfs interface ==
===top level files ===
====outputs (read only)====
Provides information about each of the 4 outputs, like in the example below:
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat outputs
0: 1V5_HSTL_A+, output frequency: 15000000 Hz, output route: MS0:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
1: 2V5_LVPECL, output frequency: 0 Hz, output route: No clock, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
2: 2V5_LVPECL, output frequency: 0 Hz, output route: No clock, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
3: 1V8_LVDS, output frequency: 150000000 Hz, output route: MS3:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
This includes:
*output voltage (1V5 - 1.5V)
*standard (HSTL)
*output inversion for of the 2 paired outputs in single-ended mode ("A+B-" A positive, B - inverted; "A+" - output B is disabled)
*output frequency
*output route - each output can be fed from multiple sources, for example "IN3:2:8" means signal from input 3 divided by 2 in the input stage and by 8 in the output stage. "MS0:1" means that output is connected to the MultiSynth output 0 with no divider
*disable state - low, high, hi-z or always on - state of the output pin when it is disabled
*output stage (and divider) power up/down state
*output enable/disable state (all outputs can be independently disabled by the global output disable)
*spread spectrum: on/off state, amplitude (in 0.01% of the output frequency steps) and the sweep rate. Only down spread is supported, so the center frequency is half-amplitude less than with spread spectrum disabled
====status (read only)====
Read and interpret status register.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat status
0x8 input clock: OK, feedback clock: LOST, PLL lock: OK, calibration: DONE
====pre_init (write only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > pre_init
Disables all outputs, loss of lock signal before setting parameters and initializing PLL
====pre_init_clear (write only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > pre_init_clear
Same as pre_init, but additionally clears all output routes and input multiplexers before setting up the needed ones
====post_init (write only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > post_init
Initializes and calibrates PLL - should be called after the PLL parameters (or the whole frequency plan) are set up.
===input/ folder===
====input/in_frequency12====
====input/in_frequency12xo====
====input/in_frequency3====
====input/in_frequency4====
====input/in_frequency56====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "25000000" > input/in_frequency3
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_frequency3
25000000
Set the input frequency applied to one of the differential input pairs (12, 56) or single-ended (3,4). "in_frequency12xo: is used to specify the frequency of the crystal connected between inputs 1 and 2. While the driver tries to make as little assumptions as possible and reads data from the si5338 registers (or actually from their cached shadows), the input frequency has to be stored off-chip and may be needed to be set up if you plan to use high-level functions to change frequency parameters even if the registers where initialized from the pre-calculated register map. Each write to these nodes also programs the input multiplexers and routes the specified pin (pin pair) to the PLL reference input, so if there are several active inputs, the last specified input will be routed.
====input/in_mux====
====input/ref_mux====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1" input/in_mux
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_mux
1
Directly control in input and feedback multiplexers
====input/in_mux_txt (read only)====
====input/ref_mux_txt (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_mux_txt
IN3(single ended)
Interpret the state of the input and feedback multiplexers
====input/in_p1_div====
====input/in_p2_div====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "32" > input/in_p1_div
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_p1_div
32
Read/write input dividers, valid values are 1,2,4,8,16 and 32
====input/in_pfd_ref====
====input/in_pfd_fb====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > input/in_pfd_ref
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_pfd_ref
0
Read/write PLL reference and feedback multiplexers selections. The feedback input can be switched to the output of the feedback multiplexer from the MSn MultiSynth output with the "input/fb_external".
====input/in_pfd_ref_txt (read only)====
====input/in_pfd_fb_txt (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_pfd_ref_txt
p1div_in(refclk)
Read and interpret the state of the reference and feedback multiplexers.
====input/fb_external====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > input/fb_external
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/fb_external
0
Switch between internal PLL feedback from the MSn divider (0) and the external input (1). The external feedback can be used in the zero-delay buffer mode, most applications use internal feedback mode.
====input/xtal_freq_txt (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/xtal_freq_txt
26MHz..30Mhz
Read crystal oscillator mode settings. Appropriate settings are selected by writing to "input/in_frequency12xo" or loading the register map prepared by the Silicon Labs software.
====input/pll_ref_frequency (read only)====
====input/pll_fb_frequency (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/pll_ref_frequency
25000000
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/pll_fb_frequency
0
Read reference and feedback frequency values. Determined by the input frequency settings, dividers and multiplexers.
===pll/ folder===
VCO frequency (use in PLL) can be set up either directly, or to match specified output frequency (one of the 4 channels). The valid range is 2.2GHz to 2.84GHz (2200000000 to 2840000000). Frequencies are specified in Hz with possible fractional part (numerator then denominator), so "2550000000 0 1" is the same as just "2550000000". In both cases "_int" and "_fract" applies to the feedback divider, the lowest jitter is achieved with integer dividers. Reading any of these nodes return the PLL frequency in Hz. "pll/pll_freq_int" is the most common option to use.
====pll/pll_freq_int====
Specify VCO frequency in HZ, require integer divider. Read VCO frequency in Hz.
====pll/pll_freq_fract====
Specify VCO frequency in HZ, allow fractional divider. Read VCO frequency in Hz.
====pll/pll_by_out_int====
Match VCO frequency to the required output frequency in HZ, require integer divider in both feedback and output dividers. Read VCO frequency in Hz.
====pll/pll_by_out_fract====
Match VCO frequency to the required output frequency in HZ, allow fractional feedback (MSn) divider. Read VCO frequency in Hz.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat pll/pll_by_out_int
2550000000 0 1
===multiSynth/ folder===
The si5338 chip uses 5 "multiSynth" fractional dividers - 4 of them (MS0..MS3) are used for the output frequencies generations, and the fifth one (MSn) is used as the PLL feeback divider. This subdirectory allows low-level control of these dividers - in most cases they can be set up indirectly by specifying the required frequencies.
====multiSynth/ms0_p123====
====multiSynth/ms1_p123====
====multiSynth/ms2_p123====
====multiSynth/ms3_p123====
====multiSynth/msn_p123====
Read/write a set of 3 registers as defined in the Reference Manual (P1, P2 and P3):
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "21248 0 1" multiSynth/ms0_p123
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms0_p123
21248 0 1
====multiSynth/ms0_abc====
====multiSynth/ms1_abc====
====multiSynth/ms2_abc====
====multiSynth/ms3_abc====
====multiSynth/msn_abc====
Read/write MultiSynth dividers using integer part, numerator and denominator (a,b and c) as referenced in the manual
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms0_abc
170 0 1
====multiSynth/ms0_freq_int====
====multiSynth/ms0_freq_fract====
====multiSynth/ms1_freq_int====
====multiSynth/ms1_freq_fract====
====multiSynth/ms2_freq_int====
====multiSynth/ms2_freq_fract====
====multiSynth/ms3_freq_int====
====multiSynth/ms3_freq_fract====
Setting integer/fractional MultiSynth dividers by the required output frequency (single integer or 3 numbers - integer, numerator and denominator). Reading back provides actual value of the frequency.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms0_freq_int
15000000 0 1
====multiSynth/ms_power_up====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0 3" > multiSynth/ms_power_up
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms_power_up
0 3
Power up selected channels, read returns the list of the powered up channels
====multiSynth/ms_power_down====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 2" > multiSynth/ms_power_down
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms_power_down
1 2
Power down selected channels, read returns the list of the powered down channels
====multiSynth/ms_reset====
Reset multiSynth dividers (''not clear when exactly they should be reset - possibly after spread spectrum changes'').
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > multiSynth/ms_reset
===output_clocks/ folder ===
====output_clocks/out0_div====
====output_clocks/out1_div====
====output_clocks/out2_div====
====output_clocks/out3_div====
Direct setting of the output divider, that can be 1,2,4,8,16 and 32. In most applications this divider is automatically set by specifying the output frequency.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "8" > output_clocks/out0_div
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_div
8
====output_clocks/out0_div_by_freq (write only)====
====output_clocks/out1_div_by_freq (write only)====
====output_clocks/out2_div_by_freq (write only)====
====output_clocks/out3_div_by_freq (write only)====
Set just the divider to match the required frequency. Frequency is specified in Hz.
====output_clocks/out0_source====
====output_clocks/out1_source====
====output_clocks/out2_source====
====output_clocks/out3_source====
Set/read the output multiplexer selection (as a number).
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "6" > output_clocks/out0_source
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_source
6
====output_clocks/out0_source_txt (read only)====
====output_clocks/out1_source_txt (read only)====
====output_clocks/out2_source_txt (read only)====
====output_clocks/out3_source_txt (read only)====
Read and interpret the output multiplexer selection.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_source_txt
MS0
====output_clocks/out0_source_freq (read only)====
====output_clocks/out1_source_freq (read only)====
====output_clocks/out2_source_freq (read only)====
====output_clocks/out3_source_freq (read only)====
Get the frequency on the input of the output divider.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_source_freq
15000000 0 1
====output_clocks/out0_route====
====output_clocks/out1_route====
====output_clocks/out2_route====
====output_clocks/out3_route====
Read/write the full route of the output clock, including the divider. Here are some examples:
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "IN3:2:8" >output_clocks/out1_route
Route clock from input 3 through input divider 2 and output divider 8
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out2_route
No clock
Output 2 is not connected to any source
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_route
MS0:1
Output 0 is connected to MultiSynth divider channel 0, output divider 1:1
====output_clocks/out0_freq_int====
====output_clocks/out0_freq_fract====
====output_clocks/out1_freq_int====
====output_clocks/out1_freq_fract====
====output_clocks/out2_freq_int====
====output_clocks/out2_freq_fract====
====output_clocks/out3_freq_int====
====output_clocks/out3_freq_fract====
Most common way to specify output frequency and route. Output is routed to the same channel MultiSynth divider, MS divider and output divider are set to match the specified frequency. "_int" suffix rounds the MS divider to the nearest integer, "_fract" allows fractional dividers. Output frequency specified in Hz as a single number or a triad of integer, numerator and denominator. When read returns the actual frequency of the output
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "150000 1 2" > output_clocks/out2_freq_fract
sh: write error: Invalid argument
Specified frequency (150KHz) is too low even with the 1:32 output divider

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "200000 1 2" > output_clocks/out2_freq_fract
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out2_freq_fract
200000 6250 12207
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "200000 1 2" > output_clocks/out2_freq_int
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out2_freq_int
200219 169 199
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out2_route
MS2:32
Output frequency for the channel 2 is set to the 200000.5 Hz first with fractional MS2 divider (resulting in 200000.512Hz), then with integer divider - 200219.8 Hz
===spread_spectrum/ folder===
Driver only supports down spread implemented in all chip revisions (si5338B does not have center spread), so the nominal frequency should be set half-amplitude higher than the the center frequency.
====spread_spectrum/ss0_regs_hex====
====spread_spectrum/ss1_regs_hex====
====spread_spectrum/ss2_regs_hex====
====spread_spectrum/ss3_regs_hex====
Spread spectrum parameters for the specified MultiSynth channel as a set of the 7 values as specified in the Reference Manual :
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss0_regs_hex
updown_par=0x77 down_pars=0x0 0x20 0xcfd up_pars= 0x100 0x1 0x0
when set up, provide the list in the same sequence (may have less than 7, then only specified values will be updated):
up/down parameter, down parameter 1, down parameter 2, down parameter 3, up parameter 1, up parameter 2, up parameter 3.
====spread_spectrum/ss0_values====
====spread_spectrum/ss1_values====
====spread_spectrum/ss2_values====
====spread_spectrum/ss3_values====
Per-channel spread spectrum values: On/Off state, spread amplitude as integer in the range of 10..500 (corresponding to 0.1% to 5% in 0.01% steps) and sweep rate in Hz (from 31500 to 63000)
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 500 31500" > spread_spectrum/ss0_values
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss0_values
Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
====spread_spectrum/ss_change_freq_mode====
Spread spectrum registers need to be re-calculated after base frequency change, this parameter specifies what to do when the MultiSynth divider is modified.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > spread_spectrum/ss_change_freq_mode
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss_change_freq_mode
0 - turn spread spectrum off on frequency change
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1" > spread_spectrum/ss_change_freq_mode
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss_change_freq_mode
1 - recalculate spread spectrum on frequency change, do not reset MS
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "2" > spread_spectrum/ss_change_freq_mode
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss_change_freq_mode
2 - turn spread spectrum off on frequency change, reset MS when SS is turned on
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "3" > spread_spectrum/ss_change_freq_mode
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss_change_freq_mode
3 - recalculate spread spectrum on frequency change, do not reset MS
====spread_spectrum/ms_reset (write only)====
Force MultiSynth reset (not sure if it is needed and when)

===output_drivers/ folder ===
Configuring output drivers - voltage, I/O standard, inversion, power up/down, output enable and state when the output is disabled
====output_drivers/1V5_HSTL_A+====
====output_drivers/1V5_HSTL_A+B+====
====output_drivers/1V5_HSTL_A+B-====
====output_drivers/1V5_HSTL_A-====
====output_drivers/1V5_HSTL_A-B+====
====output_drivers/1V5_HSTL_A-B-====
====output_drivers/1V5_HSTL_B+====
====output_drivers/1V5_HSTL_B-====
====output_drivers/1V8_CMOS_A+====
====output_drivers/1V8_CMOS_A+B+====
====output_drivers/1V8_CMOS_A+B-====
====output_drivers/1V8_CMOS_A-====
====output_drivers/1V8_CMOS_A-B+====
====output_drivers/1V8_CMOS_A-B-====
====output_drivers/1V8_CMOS_B+====
====output_drivers/1V8_CMOS_B-====
====output_drivers/1V8_LVDS====
====output_drivers/1V8_SSTL_A+====
====output_drivers/1V8_SSTL_A+B+====
====output_drivers/1V8_SSTL_A+B-====
====output_drivers/1V8_SSTL_A-====
====output_drivers/1V8_SSTL_A-B+====
====output_drivers/1V8_SSTL_A-B-====
====output_drivers/1V8_SSTL_B+====
====output_drivers/1V8_SSTL_B-====
====output_drivers/2V5_CMOS_A+====
====output_drivers/2V5_CMOS_A+B+====
====output_drivers/2V5_CMOS_A+B-====
====output_drivers/2V5_CMOS_A-====
====output_drivers/2V5_CMOS_A-B+====
====output_drivers/2V5_CMOS_A-B-====
====output_drivers/2V5_CMOS_B+====
====output_drivers/2V5_CMOS_B-====
====output_drivers/2V5_LVDS====
====output_drivers/2V5_LVPECL====
====output_drivers/2V5_SSTL_A+====
====output_drivers/2V5_SSTL_A+B+====
====output_drivers/2V5_SSTL_A+B-====
====output_drivers/2V5_SSTL_A-====
====output_drivers/2V5_SSTL_A-B+====
====output_drivers/2V5_SSTL_A-B-====
====output_drivers/2V5_SSTL_B+====
====output_drivers/2V5_SSTL_B-====
====output_drivers/3V3_CMOS_A+====
====output_drivers/3V3_CMOS_A+B+====
====output_drivers/3V3_CMOS_A+B-====
====output_drivers/3V3_CMOS_A-====
====output_drivers/3V3_CMOS_A-B+====
====output_drivers/3V3_CMOS_A-B-====
====output_drivers/3V3_CMOS_B+====
====output_drivers/3V3_CMOS_B-====
====output_drivers/3V3_LVDS====
====output_drivers/3V3_LVPECL====
====output_drivers/3V3_SSTL_A+====
====output_drivers/3V3_SSTL_A+B+====
====output_drivers/3V3_SSTL_A+B-====
====output_drivers/3V3_SSTL_A-====
====output_drivers/3V3_SSTL_A-B+====
====output_drivers/3V3_SSTL_A-B-====
====output_drivers/3V3_SSTL_B+====
====output_drivers/3V3_SSTL_B-====
Set voltage, standard and inversion of the paired outputs (A,B) where applicable by writing list of channels to one of the nodes. When read, node returns the list of outputs that have the specified parameters:
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 2" > output_drivers/2V5_SSTL_A+B+
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/2V5_SSTL_A+B+
1 2
To find out the standard of the particular output (or all of them) it is possible to read output_drivers/output<n> or just "outputs". Not all of the combinations of the low-level register values correspond to one of the valid output driver configuration listed above, these combinations will be listed as "Invalid output configuration" and provide the values of the relevant register fields, described in the Reference Manual.
====output_drivers/dis_always_on====
====output_drivers/dis_hi-z====
====output_drivers/dis_high====
====output_drivers/dis_low====
Setting (and reading back) the behavior of the outputs in the disabled state. Note output state is synchronous and requires clock to run, so if output is already in disable state, switching form "dis_low" to "dis_high" will not take effect. Switching "dis_low" -> "dis_always_on" -> "dis_high" works, as "dis_always_on" temporarily provides output clock.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/dis_hi-z
0 1 2 3
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 2" >output_drivers/dis_low
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/dis_hi-z
0 3
====output_drivers/output_dis====
====output_drivers/output_en====
Enables/disables specified channels, reads back the list of enabled/disabled ones
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output_en
0 1 2 3
====output_drivers/output_power_up====
====output_drivers/output_power_down====
Turns on/off power to the output driver and divider, reads back the list of powered up/down output channels
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output_power_up
0 2 3
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "2 3" > output_drivers/output_power_down
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output_power_up
0
====output_drivers/output0 (read only)====
====output_drivers/output1 (read only)====
====output_drivers/output2 (read only)====
====output_drivers/output3 (read only)====
====output_drivers/outputs (read only)====
List settings related to individual output channel or all of them (the last node is duplicated on the top hierarchy level):
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output0
1V5_HSTL_A+, output frequency: 15000000 Hz, output route: MS0:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/outputs
0: 1V5_HSTL_A+, output frequency: 15000000 Hz, output route: MS0:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
1: 2V5_SSTL_A+B+, output frequency: 1562500 Hz, output route: IN3:2:8, disabled state: dis_low, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
2: 2V5_SSTL_A+B+, output frequency: 200219-169/199 Hz, output route: MS2:32, ms_power_up, disabled state: dis_low, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
3: 1V8_LVDS, output frequency: 150000000 Hz, output route: MS3:1, ms_power_up, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is ON, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz Andrey.filippov

New page

The [https://sourceforge.net/p/elphel/linux-elphel/ci/master/tree/drivers/misc/si5338.c drivers/misc/si5338.c] driver allows real-time control of the [http://www.silabs.com/products/clocksoscillators/clock-generator/Pages/differential-lvcmos-clocks.aspx Silicon Labs si5338 Clock Generator] using Linux sysfs interface. It also allows setting up parameters using the Device Tree.

It is also possible to use the register map file generated by Silicon Labs software, converted by a Python [https://sourceforge.net/p/elphel/linux-elphel/ci/master/tree/helpers/si5338_register_map_dts.py script] to a Device Tree fragment (or fed to the driver using sysfs interface).

==Reference Documentation==
This driver is developed using excellent documentation provided by the chip manufacturer:
[http://www.silabs.com/Support%20Documents/TechnicalDocs/Si5338-RM.pdf] - detailed description of the device registers
[http://www.silabs.com/Support%20Documents/TechnicalDocs/Si5338.pdf] - overall chip documentation including configuration procedure
==sysfs interface ==
===top level files ===
====outputs (read only)====
Provides information about each of the 4 outputs, like in the example below:
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat outputs
0: 1V5_HSTL_A+, output frequency: 15000000 Hz, output route: MS0:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
1: 2V5_LVPECL, output frequency: 0 Hz, output route: No clock, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
2: 2V5_LVPECL, output frequency: 0 Hz, output route: No clock, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
3: 1V8_LVDS, output frequency: 150000000 Hz, output route: MS3:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
This includes:
*output voltage (1V5 - 1.5V)
*standard (HSTL)
*output inversion for of the 2 paired outputs in single-ended mode ("A+B-" A positive, B - inverted; "A+" - output B is disabled)
*output frequency
*output route - each output can be fed from multiple sources, for example "IN3:2:8" means signal from input 3 divided by 2 in the input stage and by 8 in the output stage. "MS0:1" means that output is connected to the MultiSynth output 0 with no divider
*disable state - low, high, hi-z or always on - state of the output pin when it is disabled
*output stage (and divider) power up/down state
*output enable/disable state (all outputs can be independently disabled by the global output disable)
*spread spectrum: on/off state, amplitude (in 0.01% of the output frequency steps) and the sweep rate. Only down spread is supported, so the center frequency is half-amplitude less than with spread spectrum disabled
====status (read only)====
Read and interpret status register.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat status
0x8 input clock: OK, feedback clock: LOST, PLL lock: OK, calibration: DONE
====pre_init (write only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > pre_init
Disables all outputs, loss of lock signal before setting parameters and initializing PLL
====pre_init_clear (write only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > pre_init_clear
Same as pre_init, but additionally clears all output routes and input multiplexers before setting up the needed ones
====post_init (write only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > post_init
Initializes and calibrates PLL - should be called after the PLL parameters (or the whole frequency plan) are set up.
===input/ folder===
====input/in_frequency12====
====input/in_frequency12xo====
====input/in_frequency3====
====input/in_frequency4====
====input/in_frequency56====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "25000000" > input/in_frequency3
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_frequency3
25000000
Set the input frequency applied to one of the differential input pairs (12, 56) or single-ended (3,4). "in_frequency12xo: is used to specify the frequency of the crystal connected between inputs 1 and 2. While the driver tries to make as little assumptions as possible and reads data from the si5338 registers (or actually from their cached shadows), the input frequency has to be stored off-chip and may be needed to be set up if you plan to use high-level functions to change frequency parameters even if the registers where initialized from the pre-calculated register map. Each write to these nodes also programs the input multiplexers and routes the specified pin (pin pair) to the PLL reference input, so if there are several active inputs, the last specified input will be routed.
====input/in_mux====
====input/ref_mux====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1" input/in_mux
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_mux
1
Directly control in input and feedback multiplexers
====input/in_mux_txt (read only)====
====input/ref_mux_txt (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_mux_txt
IN3(single ended)
Interpret the state of the input and feedback multiplexers
====input/in_p1_div====
====input/in_p2_div====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "32" > input/in_p1_div
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_p1_div
32
Read/write input dividers, valid values are 1,2,4,8,16 and 32
====input/in_pfd_ref====
====input/in_pfd_fb====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > input/in_pfd_ref
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_pfd_ref
0
Read/write PLL reference and feedback multiplexers selections. The feedback input can be switched to the output of the feedback multiplexer from the MSn MultiSynth output with the "input/fb_external".
====input/in_pfd_ref_txt (read only)====
====input/in_pfd_fb_txt (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_pfd_ref_txt
p1div_in(refclk)
Read and interpret the state of the reference and feedback multiplexers.
====input/fb_external====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > input/fb_external
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/fb_external
0
Switch between internal PLL feedback from the MSn divider (0) and the external input (1). The external feedback can be used in the zero-delay buffer mode, most applications use internal feedback mode.
====input/xtal_freq_txt (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/xtal_freq_txt
26MHz..30Mhz
Read crystal oscillator mode settings. Appropriate settings are selected by writing to "input/in_frequency12xo" or loading the register map prepared by the Silicon Labs software.
====input/pll_ref_frequency (read only)====
====input/pll_fb_frequency (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/pll_ref_frequency
25000000
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/pll_fb_frequency
0
Read reference and feedback frequency values. Determined by the input frequency settings, dividers and multiplexers.
===pll/ folder===
VCO frequency (use in PLL) can be set up either directly, or to match specified output frequency (one of the 4 channels). The valid range is 2.2GHz to 2.84GHz (2200000000 to 2840000000). Frequencies are specified in Hz with possible fractional part (numerator then denominator), so "2550000000 0 1" is the same as just "2550000000". In both cases "_int" and "_fract" applies to the feedback divider, the lowest jitter is achieved with integer dividers. Reading any of these nodes return the PLL frequency in Hz. "pll/pll_freq_int" is the most common option to use.
====pll/pll_freq_int====
Specify VCO frequency in HZ, require integer divider. Read VCO frequency in Hz.
====pll/pll_freq_fract====
Specify VCO frequency in HZ, allow fractional divider. Read VCO frequency in Hz.
====pll/pll_by_out_int====
Match VCO frequency to the required output frequency in HZ, require integer divider in both feedback and output dividers. Read VCO frequency in Hz.
====pll/pll_by_out_fract====
Match VCO frequency to the required output frequency in HZ, allow fractional feedback (MSn) divider. Read VCO frequency in Hz.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat pll/pll_by_out_int
2550000000 0 1
===multiSynth/ folder===
The si5338 chip uses 5 "multiSynth" fractional dividers - 4 of them (MS0..MS3) are used for the output frequencies generations, and the fifth one (MSn) is used as the PLL feeback divider. This subdirectory allows low-level control of these dividers - in most cases they can be set up indirectly by specifying the required frequencies.
====multiSynth/ms0_p123====
====multiSynth/ms1_p123====
====multiSynth/ms2_p123====
====multiSynth/ms3_p123====
====multiSynth/msn_p123====
Read/write a set of 3 registers as defined in the Reference Manual (P1, P2 and P3):
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "21248 0 1" multiSynth/ms0_p123
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms0_p123
21248 0 1
====multiSynth/ms0_abc====
====multiSynth/ms1_abc====
====multiSynth/ms2_abc====
====multiSynth/ms3_abc====
====multiSynth/msn_abc====
Read/write MultiSynth dividers using integer part, numerator and denominator (a,b and c) as referenced in the manual
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms0_abc
170 0 1
====multiSynth/ms0_freq_int====
====multiSynth/ms0_freq_fract====
====multiSynth/ms1_freq_int====
====multiSynth/ms1_freq_fract====
====multiSynth/ms2_freq_int====
====multiSynth/ms2_freq_fract====
====multiSynth/ms3_freq_int====
====multiSynth/ms3_freq_fract====
Setting integer/fractional MultiSynth dividers by the required output frequency (single integer or 3 numbers - integer, numerator and denominator). Reading back provides actual value of the frequency.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms0_freq_int
15000000 0 1
====multiSynth/ms_power_up====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0 3" > multiSynth/ms_power_up
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms_power_up
0 3
Power up selected channels, read returns the list of the powered up channels
====multiSynth/ms_power_down====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 2" > multiSynth/ms_power_down
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms_power_down
1 2
Power down selected channels, read returns the list of the powered down channels
====multiSynth/ms_reset====
Reset multiSynth dividers (''not clear when exactly they should be reset - possibly after spread spectrum changes'').
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > multiSynth/ms_reset
===spread_spectrum/ folder===

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# ls -all spread_spectrum/
drwxr-xr-x 2 root root 0 Dec 12 09:30 .
drwxr-xr-x 10 root root 0 Dec 12 08:12 ..
--w------- 1 root root 4096 Dec 12 09:30 ms_reset
-rw-r--r-- 1 root root 4096 Dec 12 09:30 ss0_regs_hex
-rw-r--r-- 1 root root 4096 Dec 12 09:30 ss0_values
-rw-r--r-- 1 root root 4096 Dec 12 09:30 ss1_regs_hex
-rw-r--r-- 1 root root 4096 Dec 12 09:30 ss1_values
-rw-r--r-- 1 root root 4096 Dec 12 09:30 ss2_regs_hex
-rw-r--r-- 1 root root 4096 Dec 12 09:30 ss2_values
-rw-r--r-- 1 root root 4096 Dec 12 09:30 ss3_regs_hex
-rw-r--r-- 1 root root 4096 Dec 12 09:30 ss3_values
-rw-r--r-- 1 root root 4096 Dec 12 09:30 ss_change_freq_mode


===output_clocks/ folder ===
====output_clocks/out0_div====
====output_clocks/out1_div====
====output_clocks/out2_div====
====output_clocks/out3_div====
Direct setting of the output divider, that can be 1,2,4,8,16 and 32. In most applications this divider is automatically set by specifying the output frequency.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "8" > output_clocks/out0_div
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_div
8
====output_clocks/out0_div_by_freq (write only)====
====output_clocks/out1_div_by_freq (write only)====
====output_clocks/out2_div_by_freq (write only)====
====output_clocks/out3_div_by_freq (write only)====
Set just the divider to match the required frequency. Frequency is specified in Hz.
====output_clocks/out0_source====
====output_clocks/out1_source====
====output_clocks/out2_source====
====output_clocks/out3_source====
Set/read the output multiplexer selection (as a number).
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "6" > output_clocks/out0_source
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_source
6
====output_clocks/out0_source_txt (read only)====
====output_clocks/out1_source_txt (read only)====
====output_clocks/out2_source_txt (read only)====
====output_clocks/out3_source_txt (read only)====
Read and interpret the output multiplexer selection.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_source_txt
MS0
====output_clocks/out0_source_freq (read only)====
====output_clocks/out1_source_freq (read only)====
====output_clocks/out2_source_freq (read only)====
====output_clocks/out3_source_freq (read only)====
Get the frequency on the input of the output divider.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_source_freq
15000000 0 1
====output_clocks/out0_route====
====output_clocks/out1_route====
====output_clocks/out2_route====
====output_clocks/out3_route====
Read/write the full route of the output clock, including the divider. Here are some examples:
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "IN3:2:8" >output_clocks/out1_route
Route clock from input 3 through input divider 2 and output divider 8
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out2_route
No clock
Output 2 is not connected to any source
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_route
MS0:1
Output 0 is connected to MultiSynth divider channel 0, output divider 1:1
====output_clocks/out0_freq_int====
====output_clocks/out0_freq_fract====
====output_clocks/out1_freq_int====
====output_clocks/out1_freq_fract====
====output_clocks/out2_freq_int====
====output_clocks/out2_freq_fract====
====output_clocks/out3_freq_int====
====output_clocks/out3_freq_fract====
Most common way to specify output frequency and route. Output is routed to the same channel MultiSynth divider, MS divider and output divider are set to match the specified frequency. "_int" suffix rounds the MS divider to the nearest integer, "_fract" allows fractional dividers. Output frequency specified in Hz as a single number or a triad of integer, numerator and denominator. When read returns the actual frequency of the output
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "150000 1 2" > output_clocks/out2_freq_fract
sh: write error: Invalid argument
Specified frequency (150KHz) is too low even with the 1:32 output divider

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "200000 1 2" > output_clocks/out2_freq_fract
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out2_freq_fract
200000 6250 12207
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "200000 1 2" > output_clocks/out2_freq_int
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out2_freq_int
200219 169 199
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out2_route
MS2:32
Output frequency for the channel 2 is set to the 200000.5 Hz first with fractional MS2 divider (resulting in 200000.512Hz), then with integer divider - 200219.8 Hz
===output_drivers/ folder ===
Configuring output drivers - voltage, I/O standard, inversion, power up/down, output enable and state when the output is disabled
====output_drivers/1V5_HSTL_A+====
====output_drivers/1V5_HSTL_A+B+====
====output_drivers/1V5_HSTL_A+B-====
====output_drivers/1V5_HSTL_A-====
====output_drivers/1V5_HSTL_A-B+====
====output_drivers/1V5_HSTL_A-B-====
====output_drivers/1V5_HSTL_B+====
====output_drivers/1V5_HSTL_B-====
====output_drivers/1V8_CMOS_A+====
====output_drivers/1V8_CMOS_A+B+====
====output_drivers/1V8_CMOS_A+B-====
====output_drivers/1V8_CMOS_A-====
====output_drivers/1V8_CMOS_A-B+====
====output_drivers/1V8_CMOS_A-B-====
====output_drivers/1V8_CMOS_B+====
====output_drivers/1V8_CMOS_B-====
====output_drivers/1V8_LVDS====
====output_drivers/1V8_SSTL_A+====
====output_drivers/1V8_SSTL_A+B+====
====output_drivers/1V8_SSTL_A+B-====
====output_drivers/1V8_SSTL_A-====
====output_drivers/1V8_SSTL_A-B+====
====output_drivers/1V8_SSTL_A-B-====
====output_drivers/1V8_SSTL_B+====
====output_drivers/1V8_SSTL_B-====
====output_drivers/2V5_CMOS_A+====
====output_drivers/2V5_CMOS_A+B+====
====output_drivers/2V5_CMOS_A+B-====
====output_drivers/2V5_CMOS_A-====
====output_drivers/2V5_CMOS_A-B+====
====output_drivers/2V5_CMOS_A-B-====
====output_drivers/2V5_CMOS_B+====
====output_drivers/2V5_CMOS_B-====
====output_drivers/2V5_LVDS====
====output_drivers/2V5_LVPECL====
====output_drivers/2V5_SSTL_A+====
====output_drivers/2V5_SSTL_A+B+====
====output_drivers/2V5_SSTL_A+B-====
====output_drivers/2V5_SSTL_A-====
====output_drivers/2V5_SSTL_A-B+====
====output_drivers/2V5_SSTL_A-B-====
====output_drivers/2V5_SSTL_B+====
====output_drivers/2V5_SSTL_B-====
====output_drivers/3V3_CMOS_A+====
====output_drivers/3V3_CMOS_A+B+====
====output_drivers/3V3_CMOS_A+B-====
====output_drivers/3V3_CMOS_A-====
====output_drivers/3V3_CMOS_A-B+====
====output_drivers/3V3_CMOS_A-B-====
====output_drivers/3V3_CMOS_B+====
====output_drivers/3V3_CMOS_B-====
====output_drivers/3V3_LVDS====
====output_drivers/3V3_LVPECL====
====output_drivers/3V3_SSTL_A+====
====output_drivers/3V3_SSTL_A+B+====
====output_drivers/3V3_SSTL_A+B-====
====output_drivers/3V3_SSTL_A-====
====output_drivers/3V3_SSTL_A-B+====
====output_drivers/3V3_SSTL_A-B-====
====output_drivers/3V3_SSTL_B+====
====output_drivers/3V3_SSTL_B-====
Set voltage, standard and inversion of the paired outputs (A,B) where applicable by writing list of channels to one of the nodes. When read, node returns the list of outputs that have the specified parameters:
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 2" > output_drivers/2V5_SSTL_A+B+
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/2V5_SSTL_A+B+
1 2
To find out the standard of the particular output (or all of them) it is possible to read output_drivers/output<n> or just "outputs". Not all of the combinations of the low-level register values correspond to one of the valid output driver configuration listed above, these combinations will be listed as "Invalid output configuration" and provide the values of the relevant register fields, described in the Reference Manual.
====output_drivers/dis_always_on====
====output_drivers/dis_hi-z====
====output_drivers/dis_high====
====output_drivers/dis_low====
Setting (and reading back) the behavior of the outputs in the disabled state. Note output state is synchronous and requires clock to run, so if output is already in disable state, switching form "dis_low" to "dis_high" will not take effect. Switching "dis_low" -> "dis_always_on" -> "dis_high" works, as "dis_always_on" temporarily provides output clock.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/dis_hi-z
0 1 2 3
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 2" >output_drivers/dis_low
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/dis_hi-z
0 3
====output_drivers/output_dis====
====output_drivers/output_en====
Enables/disables specified channels, reads back the list of enabled/disabled ones
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output_en
0 1 2 3
====output_drivers/output_power_up====
====output_drivers/output_power_down====
Turns on/off power to the output driver and divider, reads back the list of powered up/down output channels
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output_power_up
0 2 3
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "2 3" > output_drivers/output_power_down
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output_power_up
0
====output_drivers/output0 (read only)====
====output_drivers/output1 (read only)====
====output_drivers/output2 (read only)====
====output_drivers/output3 (read only)====
====output_drivers/outputs (read only)====
List settings related to individual output channel or all of them (the last node is duplicated on the top hierarchy level):
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output0
1V5_HSTL_A+, output frequency: 15000000 Hz, output route: MS0:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/outputs
0: 1V5_HSTL_A+, output frequency: 15000000 Hz, output route: MS0:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
1: 2V5_SSTL_A+B+, output frequency: 1562500 Hz, output route: IN3:2:8, disabled state: dis_low, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
2: 2V5_SSTL_A+B+, output frequency: 200219-169/199 Hz, output route: MS2:32, ms_power_up, disabled state: dis_low, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
3: 1V8_LVDS, output frequency: 150000000 Hz, output route: MS3:1, ms_power_up, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is ON, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz Andrey.filippov

New page

The [https://sourceforge.net/p/elphel/linux-elphel/ci/master/tree/drivers/misc/si5338.c drivers/misc/si5338.c] driver allows real-time control of the [http://www.silabs.com/products/clocksoscillators/clock-generator/Pages/differential-lvcmos-clocks.aspx Silicon Labs si5338 Clock Generator] using Linux sysfs interface. It also allows setting up parameters using the Device Tree.

It is also possible to use the register map file generated by Silicon Labs software, converted by a Python [https://sourceforge.net/p/elphel/linux-elphel/ci/master/tree/helpers/si5338_register_map_dts.py script] to a Device Tree fragment (or fed to the driver using sysfs interface).

==Reference Documentation==
This driver is developed using excellent documentation provided by the chip manufacturer:
[http://www.silabs.com/Support%20Documents/TechnicalDocs/Si5338-RM.pdf] - detailed description of the device registers
[http://www.silabs.com/Support%20Documents/TechnicalDocs/Si5338.pdf] - overall chip documentation including configuration procedure
==sysfs interface ==
===top level files ===
====outputs (read only)====
Provides information about each of the 4 outputs, like in the example below:
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat outputs
0: 1V5_HSTL_A+, output frequency: 15000000 Hz, output route: MS0:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
1: 2V5_LVPECL, output frequency: 0 Hz, output route: No clock, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
2: 2V5_LVPECL, output frequency: 0 Hz, output route: No clock, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
3: 1V8_LVDS, output frequency: 150000000 Hz, output route: MS3:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
This includes:
*output voltage (1V5 - 1.5V)
*standard (HSTL)
*output inversion for of the 2 paired outputs in single-ended mode ("A+B-" A positive, B - inverted; "A+" - output B is disabled)
*output frequency
*output route - each output can be fed from multiple sources, for example "IN3:2:8" means signal from input 3 divided by 2 in the input stage and by 8 in the output stage. "MS0:1" means that output is connected to the MultiSynth output 0 with no divider
*disable state - low, high, hi-z or always on - state of the output pin when it is disabled
*output stage (and divider) power up/down state
*output enable/disable state (all outputs can be independently disabled by the global output disable)
*spread spectrum: on/off state, amplitude (in 0.01% of the output frequency steps) and the sweep rate. Only down spread is supported, so the center frequency is half-amplitude less than with spread spectrum disabled
====status (read only)====
Read and interpret status register.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat status
0x8 input clock: OK, feedback clock: LOST, PLL lock: OK, calibration: DONE
====pre_init (write only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > pre_init
Disables all outputs, loss of lock signal before setting parameters and initializing PLL
====pre_init_clear (write only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > pre_init_clear
Same as pre_init, but additionally clears all output routes and input multiplexers before setting up the needed ones
====post_init (write only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > post_init
Initializes and calibrates PLL - should be called after the PLL parameters (or the whole frequency plan) are set up.
===input/ folder===
====input/in_frequency12====
====input/in_frequency12xo====
====input/in_frequency3====
====input/in_frequency4====
====input/in_frequency56====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "25000000" > input/in_frequency3
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_frequency3
25000000
Set the input frequency applied to one of the differential input pairs (12, 56) or single-ended (3,4). "in_frequency12xo: is used to specify the frequency of the crystal connected between inputs 1 and 2. While the driver tries to make as little assumptions as possible and reads data from the si5338 registers (or actually from their cached shadows), the input frequency has to be stored off-chip and may be needed to be set up if you plan to use high-level functions to change frequency parameters even if the registers where initialized from the pre-calculated register map. Each write to these nodes also programs the input multiplexers and routes the specified pin (pin pair) to the PLL reference input, so if there are several active inputs, the last specified input will be routed.
====input/in_mux====
====input/ref_mux====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1" input/in_mux
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_mux
1
Directly control in input and feedback multiplexers
====input/in_mux_txt (read only)====
====input/ref_mux_txt (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_mux_txt
IN3(single ended)
Interpret the state of the input and feedback multiplexers
====input/in_p1_div====
====input/in_p2_div====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "32" > input/in_p1_div
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_p1_div
32
Read/write input dividers, valid values are 1,2,4,8,16 and 32
====input/in_pfd_ref====
====input/in_pfd_fb====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > input/in_pfd_ref
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_pfd_ref
0
Read/write PLL reference and feedback multiplexers selections. The feedback input can be switched to the output of the feedback multiplexer from the MSn MultiSynth output with the "input/fb_external".
====input/in_pfd_ref_txt (read only)====
====input/in_pfd_fb_txt (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_pfd_ref_txt
p1div_in(refclk)
Read and interpret the state of the reference and feedback multiplexers.
====input/fb_external====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > input/fb_external
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/fb_external
0
Switch between internal PLL feedback from the MSn divider (0) and the external input (1). The external feedback can be used in the zero-delay buffer mode, most applications use internal feedback mode.
====input/xtal_freq_txt (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/xtal_freq_txt
26MHz..30Mhz
Read crystal oscillator mode settings. Appropriate settings are selected by writing to "input/in_frequency12xo" or loading the register map prepared by the Silicon Labs software.
====input/pll_ref_frequency (read only)====
====input/pll_fb_frequency (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/pll_ref_frequency
25000000
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/pll_fb_frequency
0
Read reference and feedback frequency values. Determined by the input frequency settings, dividers and multiplexers.
===pll/ folder===
VCO frequency (use in PLL) can be set up either directly, or to match specified output frequency (one of the 4 channels). The valid range is 2.2GHz to 2.84GHz (2200000000 to 2840000000). Frequencies are specified in Hz with possible fractional part (numerator then denominator), so "2550000000 0 1" is the same as just "2550000000". In both cases "_int" and "_fract" applies to the feedback divider, the lowest jitter is achieved with integer dividers. Reading any of these nodes return the PLL frequency in Hz. "pll/pll_freq_int" is the most common option to use.
====pll/pll_freq_int====
Specify VCO frequency in HZ, require integer divider. Read VCO frequency in Hz.
====pll/pll_freq_fract====
Specify VCO frequency in HZ, allow fractional divider. Read VCO frequency in Hz.
====pll/pll_by_out_int====
Match VCO frequency to the required output frequency in HZ, require integer divider in both feedback and output dividers. Read VCO frequency in Hz.
====pll/pll_by_out_fract====
Match VCO frequency to the required output frequency in HZ, allow fractional feedback (MSn) divider. Read VCO frequency in Hz.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat pll/pll_by_out_int
2550000000 0 1
===multiSynth/ folder===
The si5338 chip uses 5 "multiSynth" fractional dividers - 4 of them (MS0..MS3) are used for the output frequencies generations, and the fifth one (MSn) is used as the PLL feeback divider. This subdirectory allows low-level control of these dividers - in most cases they can be set up indirectly by specifying the required frequencies.
====multiSynth/ms0_p123====
====multiSynth/ms1_p123====
====multiSynth/ms2_p123====
====multiSynth/ms3_p123====
====multiSynth/msn_p123====
Read/write a set of 3 registers as defined in the Reference Manual (P1, P2 and P3):
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "21248 0 1" multiSynth/ms0_p123
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms0_p123
21248 0 1
====multiSynth/ms0_abc====
====multiSynth/ms1_abc====
====multiSynth/ms2_abc====
====multiSynth/ms3_abc====
====multiSynth/msn_abc====
Read/write MultiSynth dividers using integer part, numerator and denominator (a,b and c) as referenced in the manual
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms0_abc
170 0 1
====multiSynth/ms0_freq_int====
====multiSynth/ms0_freq_fract====
====multiSynth/ms1_freq_int====
====multiSynth/ms1_freq_fract====
====multiSynth/ms2_freq_int====
====multiSynth/ms2_freq_fract====
====multiSynth/ms3_freq_int====
====multiSynth/ms3_freq_fract====
Setting integer/fractional MultiSynth dividers by the required output frequency (single integer or 3 numbers - integer, numerator and denominator). Reading back provides actual value of the frequency.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms0_freq_int
15000000 0 1
====multiSynth/ms_power_up====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0 3" > multiSynth/ms_power_up
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms_power_up
0 3
Power up selected channels, read returns the list of the powered up channels
====multiSynth/ms_power_down====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 2" > multiSynth/ms_power_down
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms_power_down
1 2
Power down selected channels, read returns the list of the powered down channels
====multiSynth/ms_reset====
Reset multiSynth dividers (''not clear when exactly they should be reset - possibly after spread spectrum changes'').
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > multiSynth/ms_reset



root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# ls -all output_clocks/
drwxr-xr-x 2 root root 0 Dec 12 02:30 .
drwxr-xr-x 10 root root 0 Dec 12 00:36 ..
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out0_div
--w------- 1 root root 4096 Dec 12 02:30 out0_div_by_freq
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out0_freq_fract
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out0_freq_int
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out0_route
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out0_source
-r--r--r-- 1 root root 4096 Dec 12 02:30 out0_source_freq
-r--r--r-- 1 root root 4096 Dec 12 02:30 out0_source_txt
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out1_div
--w------- 1 root root 4096 Dec 12 02:30 out1_div_by_freq
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out1_freq_fract
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out1_freq_int
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out1_route
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out1_source
-r--r--r-- 1 root root 4096 Dec 12 02:30 out1_source_freq
-r--r--r-- 1 root root 4096 Dec 12 02:30 out1_source_txt
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out2_div
--w------- 1 root root 4096 Dec 12 02:30 out2_div_by_freq
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out2_freq_fract
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out2_freq_int
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out2_route
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out2_source
-r--r--r-- 1 root root 4096 Dec 12 02:30 out2_source_freq
-r--r--r-- 1 root root 4096 Dec 12 02:30 out2_source_txt
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out3_div
--w------- 1 root root 4096 Dec 12 02:30 out3_div_by_freq
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out3_freq_fract
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out3_freq_int
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out3_route
-rw-r--r-- 1 root root 4096 Dec 12 02:30 out3_source
-r--r--r-- 1 root root 4096 Dec 12 02:30 out3_source_freq
-r--r--r-- 1 root root 4096 Dec 12 02:30 out3_source_txt
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_div
1
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_freq_int
15000000 0 1
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_source
6
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_source_txt
MS0
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_source_freq
15000000 0 1
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_route
MS0:1
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070#
Broadcast message from root@elphel393 (ttyPS0) (Thu Dec 12 05:03:33 2013):
The system is going down for reboot NOW!
Connection to 192.168.0.8 closed by remote host.
Connection to 192.168.0.8 closed. Andrey.filippov

New page

The [https://sourceforge.net/p/elphel/linux-elphel/ci/master/tree/drivers/misc/si5338.c drivers/misc/si5338.c] driver allows real-time control of the [http://www.silabs.com/products/clocksoscillators/clock-generator/Pages/differential-lvcmos-clocks.aspx Silicon Labs si5338 Clock Generator] using Linux sysfs interface. It also allows setting up parameters using the Device Tree.

It is also possible to use the register map file generated by Silicon Labs software, converted by a Python [https://sourceforge.net/p/elphel/linux-elphel/ci/master/tree/helpers/si5338_register_map_dts.py script] to a Device Tree fragment (or fed to the driver using sysfs interface).

==Reference Documentation==
This driver is developed using excellent documentation provided by the chip manufacturer:
[http://www.silabs.com/Support%20Documents/TechnicalDocs/Si5338-RM.pdf] - detailed description of the device registers
[http://www.silabs.com/Support%20Documents/TechnicalDocs/Si5338.pdf] - overall chip documentation including configuration procedure
==sysfs interface ==
===top level files ===
====outputs (read only)====
Provides information about each of the 4 outputs, like in the example below:
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat outputs
0: 1V5_HSTL_A+, output frequency: 15000000 Hz, output route: MS0:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
1: 2V5_LVPECL, output frequency: 0 Hz, output route: No clock, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
2: 2V5_LVPECL, output frequency: 0 Hz, output route: No clock, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
3: 1V8_LVDS, output frequency: 150000000 Hz, output route: MS3:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
This includes:
*output voltage (1V5 - 1.5V)
*standard (HSTL)
*output inversion for of the 2 paired outputs in single-ended mode ("A+B-" A positive, B - inverted; "A+" - output B is disabled)
*output frequency
*output route - each output can be fed from multiple sources, for example "IN3:2:8" means signal from input 3 divided by 2 in the input stage and by 8 in the output stage. "MS0:1" means that output is connected to the MultiSynth output 0 with no divider
*disable state - low, high, hi-z or always on - state of the output pin when it is disabled
*output stage (and divider) power up/down state
*output enable/disable state (all outputs can be independently disabled by the global output disable)
*spread spectrum: on/off state, amplitude (in 0.01% of the output frequency steps) and the sweep rate. Only down spread is supported, so the center frequency is half-amplitude less than with spread spectrum disabled
====status (read only)====
Read and interpret status register.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat status
0x8 input clock: OK, feedback clock: LOST, PLL lock: OK, calibration: DONE
====pre_init (write only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > pre_init
Disables all outputs, loss of lock signal before setting parameters and initializing PLL
====pre_init_clear (write only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > pre_init_clear
Same as pre_init, but additionally clears all output routes and input multiplexers before setting up the needed ones
====post_init (write only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > post_init
Initializes and calibrates PLL - should be called after the PLL parameters (or the whole frequency plan) are set up.
==="input" folder===
====input/in_frequency12====
====input/in_frequency12xo====
====input/in_frequency3====
====input/in_frequency4====
====input/in_frequency56====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "25000000" > input/in_frequency3
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_frequency3
25000000
Set the input frequency applied to one of the differential input pairs (12, 56) or single-ended (3,4). "in_frequency12xo: is used to specify the frequency of the crystal connected between inputs 1 and 2. While the driver tries to make as little assumptions as possible and reads data from the si5338 registers (or actually from their cached shadows), the input frequency has to be stored off-chip and may be needed to be set up if you plan to use high-level functions to change frequency parameters even if the registers where initialized from the pre-calculated register map. Each write to these nodes also programs the input multiplexers and routes the specified pin (pin pair) to the PLL reference input, so if there are several active inputs, the last specified input will be routed.
====input/in_mux====
====input/ref_mux====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1" input/in_mux
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_mux
1
Directly control in input and feedback multiplexers
====input/in_mux_txt (read only)====
====input/ref_mux_txt (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_mux_txt
IN3(single ended)
Interpret the state of the input and feedback multiplexers
====input/in_p1_div====
====input/in_p2_div====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "32" > input/in_p1_div
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_p1_div
32
Read/write input dividers, valid values are 1,2,4,8,16 and 32
====input/in_pfd_ref====
====input/in_pfd_fb====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > input/in_pfd_ref
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_pfd_ref
0
Read/write PLL reference and feedback multiplexers selections. The feedback input can be switched to the output of the feedback multiplexer from the MSn MultiSynth output with the "input/fb_external".
====input/in_pfd_ref_txt (read only)====
====input/in_pfd_fb_txt (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_pfd_ref_txt
p1div_in(refclk)
Read and interpret the state of the reference and feedback multiplexers.
====input/fb_external====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > input/fb_external
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/fb_external
0
Switch between internal PLL feedback from the MSn divider (0) and the external input (1). The external feedback can be used in the zero-delay buffer mode, most applications use internal feedback mode.
====input/xtal_freq_txt (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/xtal_freq_txt
26MHz..30Mhz
Read crystal oscillator mode settings. Appropriate settings are selected by writing to "input/in_frequency12xo" or loading the register map prepared by the Silicon Labs software.
====input/pll_ref_frequency (read only)====
====input/pll_fb_frequency (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/pll_ref_frequency
25000000
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/pll_fb_frequency
0
Read reference and feedback frequency values. Determined by the input frequency settings, dividers and multiplexers.
==="pll" folder===
PLL frequency can be set up either directly, or to match specified output frequency (one of the 4 channels). Frequencies as specified in Hz with possible fractional part (numerator then denominator), so "2550000000 0 1" is the same as just "2550000000". In both cases "_int" and "_fract" applies to the feedback divider, the lowest jitter is achieved with integer dividers. Reading any of these nodes return the PLL frequency in Hz. "pll/pll_freq_int" is the most common option to use.
====pll/pll_freq_int====
Specify VCO frequency in HZ, require integer divider. Read VCO frequency in Hz.
====pll/pll_freq_fract====
Specify VCO frequency in HZ, allow fractional divider. Read VCO frequency in Hz.
====pll/pll_by_out_int====
Match VCO frequency to the required output frequency in HZ, require integer divider in both feedback and output dividers. Read VCO frequency in Hz.
====pll/pll_by_out_fract====
Match VCO frequency to the required output frequency in HZ, allow fractional feedback (MSn) divider. Read VCO frequency in Hz.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat pll/pll_by_out_int
2550000000 0 1




-rw-r--r-- 1 root root 4096 Dec 12 02:30 pll_by_out_fract
-rw-r--r-- 1 root root 4096 Dec 12 02:30 pll_by_out_int
-rw-r--r-- 1 root root 4096 Dec 12 02:30 pll_freq_fract
-rw-r--r-- 1 root root 4096 Dec 12 02:30 pll_freq_int Andrey.filippov

New page

The [https://sourceforge.net/p/elphel/linux-elphel/ci/master/tree/drivers/misc/si5338.c drivers/misc/si5338.c] driver allows real-time control of the [http://www.silabs.com/products/clocksoscillators/clock-generator/Pages/differential-lvcmos-clocks.aspx Silicon Labs si5338 Clock Generator] using Linux sysfs interface. It also allows setting up parameters using the Device Tree.

It is also possible to use the register map file generated by Silicon Labs software, converted by a Python [https://sourceforge.net/p/elphel/linux-elphel/ci/master/tree/helpers/si5338_register_map_dts.py script] to a Device Tree fragment (or fed to the driver using sysfs interface).

==Reference Documentation==
This driver is developed using excellent documentation provided by the chip manufacturer:
[http://www.silabs.com/Support%20Documents/TechnicalDocs/Si5338-RM.pdf] - detailed description of the device registers
[http://www.silabs.com/Support%20Documents/TechnicalDocs/Si5338.pdf] - overall chip documentation including configuration procedure
==sysfs interface ==
===top level files ===
====outputs (read only)====
Provides information about each of the 4 outputs, like in the example below:
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat outputs
0: 1V5_HSTL_A+, output frequency: 15000000 Hz, output route: MS0:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
1: 2V5_LVPECL, output frequency: 0 Hz, output route: No clock, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
2: 2V5_LVPECL, output frequency: 0 Hz, output route: No clock, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
3: 1V8_LVDS, output frequency: 150000000 Hz, output route: MS3:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
This includes:
*output voltage (1V5 - 1.5V)
*standard (HSTL)
*output inversion for of the 2 paired outputs in single-ended mode ("A+B-" A positive, B - inverted; "A+" - output B is disabled)
*output frequency
*output route - each output can be fed from multiple sources, for example "IN3:2:8" means signal from input 3 divided by 2 in the input stage and by 8 in the output stage. "MS0:1" means that output is connected to the MultiSynth output 0 with no divider
*disable state - low, high, hi-z or always on - state of the output pin when it is disabled
*output stage (and divider) power up/down state
*output enable/disable state (all outputs can be independently disabled by the global output disable)
*spread spectrum: on/off state, amplitude (in 0.01% of the output frequency steps) and the sweep rate. Only down spread is supported, so the center frequency is half-amplitude less than with spread spectrum disabled
====status (read only)====
Read and interpret status register.
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat status
0x8 input clock: OK, feedback clock: LOST, PLL lock: OK, calibration: DONE
====pre_init (write only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > pre_init
Disables all outputs, loss of lock signal before setting parameters and initializing PLL
====pre_init_clear (write only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > pre_init_clear
Same as pre_init, but additionally clears all output routes and input multiplexers before setting up the needed ones
====post_init (write only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > post_init
Initializes and calibrates PLL - should be called after the PLL parameters (or the whole frequency plan) are set up.
===input folder===
====input/in_frequency12====
====input/in_frequency12xo====
====input/in_frequency3====
====input/in_frequency4====
====input/in_frequency56====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "25000000" > input/in_frequency3
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_frequency3
25000000
Set the input frequency applied to one of the differential input pairs (12, 56) or single-ended (3,4). "in_frequency12xo: is used to specify the frequency of the crystal connected between inputs 1 and 2. While the driver tries to make as little assumptions as possible and reads data from the si5338 registers (or actually from their cached shadows), the input frequency has to be stored off-chip and may be needed to be set up if you plan to use high-level functions to change frequency parameters even if the registers where initialized from the pre-calculated register map. Each write to these nodes also programs the input multiplexers and routes the specified pin (pin pair) to the PLL reference input, so if there are several active inputs, the last specified input will be routed.
====input/in_mux====
====input/ref_mux====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1" input/in_mux
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_mux
1
Directly control in input and feedback multiplexers
====input/in_mux_txt (read only)====
====input/ref_mux_txt (read only)====
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_mux_txt
IN3(single ended)
Interpret the state of the input and feedback multiplexers Andrey.filippov

Build everything all together:

← Older revision Revision as of 01:12, 12 December 2013 (6 intermediate revisions not shown)Line 36: Line 36:   git clone git://git.code.sf.net/p/elphel/meta-ezynq meta-ezynq   git clone git://git.code.sf.net/p/elphel/meta-ezynq meta-ezynq   git clone -b dora https://github.com/openembedded/meta-oe.git   git clone -b dora https://github.com/openembedded/meta-oe.git  + git clone -b dora https://github.com/Xilinx/meta-xilinx.git </font> </font> * Step 2: Init environment * Step 2: Init environment Line 48: Line 49:   <absolute-path>/poky/meta-oe/meta-oe \   <absolute-path>/poky/meta-oe/meta-oe \   <absolute-path>/poky/meta-oe/meta-webserver \   <absolute-path>/poky/meta-oe/meta-webserver \  + <absolute-path>/poky/meta-oe/meta-networking \  + <absolute-path>/poky/meta-xilinx \ </font> </font> * Step 4: Edit ''build/conf/local.conf'' - set MACHINE and other things: * Step 4: Edit ''build/conf/local.conf'' - set MACHINE and other things: Line 59: Line 62: * Currently having 4 MACHINES: elphel393, microzed, zc706 and zedboard * Currently having 4 MACHINES: elphel393, microzed, zc706 and zedboard -==<font color="blue">Build ezynq-u-boot</font>==+==<font color="blue">Build bootloader</font>== <font size='2'> <font size='2'> -  bitbake ezynq-u-boot+  bitbake u-boot-ezynq  + or  + bitbake u-boot  + or  + bitbake virtual/bootloader </font> </font> ====Output==== ====Output==== Line 70: Line 77: * Is there a way to build it by running ''bitbake core-image-elphel393'' * Is there a way to build it by running ''bitbake core-image-elphel393'' </font> </font> -  -  ==<font color="blue">Build kernel</font>== ==<font color="blue">Build kernel</font>== <font size='2'> <font size='2'>   bitbake linux-xlnx   bitbake linux-xlnx  + or  + bitbake virtual/kernel </font> </font> ====Output==== ====Output==== Line 160: Line 167: ==<font color="blue">Build everything all together</font>== ==<font color="blue">Build everything all together</font>== <font size='2'> <font size='2'> -  bitbake ezynq-u-boot linux-xlnx core-image-elphel393+  bitbake u-boot-ezynq linux-xlnx core-image-elphel393 </font> </font> -  ==<font color="blue">Build toolchain (not necessary - needed only for building ezynq targets outside poky)</font>== ==<font color="blue">Build toolchain (not necessary - needed only for building ezynq targets outside poky)</font>== Line 252: Line 258: * Program (the driver understands both *.bit and *.bit.bin) * Program (the driver understands both *.bit and *.bit.bin)   cat test.bit > /dev/xdevcfg   cat test.bit > /dev/xdevcfg  +</font>  +  +==<font color='blue'>Create and set up an own external mirror in Yocto/OpenEmbedded</font>==  +<font size='2'>  +* To the ''build/conf/local.conf'' add:  + SOURCE_MIRROR_URL = "file:///data/sources/"  + INHERIT += "own-mirrors"  + BB_GENERATE_MIRROR_TARBALLS = "1"  +* Rebuild the target  + <font color='red'>It didn't store anything in ''/data/sources/'', but in the ''build/downloads/'' instead - tar.gz + tar.gz's made from cloned git repositories.</font>  +* Upload the archives to your mirror website  +* To the ''build/conf/local.conf'' add:  + MIRRORS =+ "http://.*/.*    http://mirror.elphel.com/elphel393_mirror/ \n "  +* If no need - comment out the files in the ''build/conf/local.conf'':  + #SOURCE_MIRROR_URL = "file:///data/sources/"  + #INHERIT += "own-mirrors"  + #BB_GENERATE_MIRROR_TARBALLS = "1" </font> </font> Oleg

Build ezynq-u-boot:

← Older revision Revision as of 01:11, 12 December 2013 (4 intermediate revisions not shown)Line 36: Line 36:   git clone git://git.code.sf.net/p/elphel/meta-ezynq meta-ezynq   git clone git://git.code.sf.net/p/elphel/meta-ezynq meta-ezynq   git clone -b dora https://github.com/openembedded/meta-oe.git   git clone -b dora https://github.com/openembedded/meta-oe.git  + git clone -b dora https://github.com/Xilinx/meta-xilinx.git </font> </font> * Step 2: Init environment * Step 2: Init environment Line 48: Line 49:   <absolute-path>/poky/meta-oe/meta-oe \   <absolute-path>/poky/meta-oe/meta-oe \   <absolute-path>/poky/meta-oe/meta-webserver \   <absolute-path>/poky/meta-oe/meta-webserver \  + <absolute-path>/poky/meta-oe/meta-networking \  + <absolute-path>/poky/meta-xilinx \ </font> </font> * Step 4: Edit ''build/conf/local.conf'' - set MACHINE and other things: * Step 4: Edit ''build/conf/local.conf'' - set MACHINE and other things: Line 59: Line 62: * Currently having 4 MACHINES: elphel393, microzed, zc706 and zedboard * Currently having 4 MACHINES: elphel393, microzed, zc706 and zedboard -==<font color="blue">Build ezynq-u-boot</font>==+==<font color="blue">Build u-boot-ezynq</font>== <font size='2'> <font size='2'> -  bitbake ezynq-u-boot+  bitbake u-boot-ezynq  + or  + bitbake u-boot  + or  + bitbake virtual/bootloader </font> </font> ====Output==== ====Output==== Line 70: Line 77: * Is there a way to build it by running ''bitbake core-image-elphel393'' * Is there a way to build it by running ''bitbake core-image-elphel393'' </font> </font> -  -  ==<font color="blue">Build kernel</font>== ==<font color="blue">Build kernel</font>== <font size='2'> <font size='2'>   bitbake linux-xlnx   bitbake linux-xlnx  + or  + bitbake virtual/kernel </font> </font> ====Output==== ====Output==== Line 252: Line 259: * Program (the driver understands both *.bit and *.bit.bin) * Program (the driver understands both *.bit and *.bit.bin)   cat test.bit > /dev/xdevcfg   cat test.bit > /dev/xdevcfg  +</font>  +  +==<font color='blue'>Create and set up an own external mirror in Yocto/OpenEmbedded</font>==  +<font size='2'>  +* To the ''build/conf/local.conf'' add:  + SOURCE_MIRROR_URL = "file:///data/sources/"  + INHERIT += "own-mirrors"  + BB_GENERATE_MIRROR_TARBALLS = "1"  +* Rebuild the target  + <font color='red'>It didn't store anything in ''/data/sources/'', but in the ''build/downloads/'' instead - tar.gz + tar.gz's made from cloned git repositories.</font>  +* Upload the archives to your mirror website  +* To the ''build/conf/local.conf'' add:  + MIRRORS =+ "http://.*/.*    http://mirror.elphel.com/elphel393_mirror/ \n "  +* If no need - comment out the files in the ''build/conf/local.conf'':  + #SOURCE_MIRROR_URL = "file:///data/sources/"  + #INHERIT += "own-mirrors"  + #BB_GENERATE_MIRROR_TARBALLS = "1" </font> </font> Oleg

← Older revision Revision as of 00:38, 11 December 2013 (2 intermediate revisions not shown)Line 36: Line 36:   git clone git://git.code.sf.net/p/elphel/meta-ezynq meta-ezynq   git clone git://git.code.sf.net/p/elphel/meta-ezynq meta-ezynq   git clone -b dora https://github.com/openembedded/meta-oe.git   git clone -b dora https://github.com/openembedded/meta-oe.git  + git clone -b dora https://github.com/Xilinx/meta-xilinx.git </font> </font> * Step 2: Init environment * Step 2: Init environment Line 48: Line 49:   <absolute-path>/poky/meta-oe/meta-oe \   <absolute-path>/poky/meta-oe/meta-oe \   <absolute-path>/poky/meta-oe/meta-webserver \   <absolute-path>/poky/meta-oe/meta-webserver \  + <absolute-path>/poky/meta-oe/meta-networking \  + <absolute-path>/poky/meta-xilinx \ </font> </font> * Step 4: Edit ''build/conf/local.conf'' - set MACHINE and other things: * Step 4: Edit ''build/conf/local.conf'' - set MACHINE and other things: Line 252: Line 255: * Program (the driver understands both *.bit and *.bit.bin) * Program (the driver understands both *.bit and *.bit.bin)   cat test.bit > /dev/xdevcfg   cat test.bit > /dev/xdevcfg  +</font>  +  +==<font color='blue'>Create and set up an own external mirror in Yocto/OpenEmbedded</font>==  +<font size='2'>  +* To the ''build/conf/local.conf'' add:  + SOURCE_MIRROR_URL = "file:///data/sources/"  + INHERIT += "own-mirrors"  + BB_GENERATE_MIRROR_TARBALLS = "1"  +* Rebuild the target  + <font color='red'>It didn't store anything in ''/data/sources/'', but in the ''build/downloads/'' instead - tar.gz + tar.gz's made from cloned git repositories.</font>  +* Upload the archives to your mirror website  +* To the ''build/conf/local.conf'' add:  + MIRRORS =+ "http://.*/.*    http://mirror.elphel.com/elphel393_mirror/ \n "  +* If no need - comment out the files in the ''build/conf/local.conf'':  + #SOURCE_MIRROR_URL = "file:///data/sources/"  + #INHERIT += "own-mirrors"  + #BB_GENERATE_MIRROR_TARBALLS = "1" </font> </font> Oleg

Setup:

← Older revision Revision as of 01:52, 10 December 2013 Line 36: Line 36:   git clone git://git.code.sf.net/p/elphel/meta-ezynq meta-ezynq   git clone git://git.code.sf.net/p/elphel/meta-ezynq meta-ezynq   git clone -b dora https://github.com/openembedded/meta-oe.git   git clone -b dora https://github.com/openembedded/meta-oe.git  + git clone -b dora https://github.com/Xilinx/meta-xilinx.git </font> </font> * Step 2: Init environment * Step 2: Init environment Line 48: Line 49:   <absolute-path>/poky/meta-oe/meta-oe \   <absolute-path>/poky/meta-oe/meta-oe \   <absolute-path>/poky/meta-oe/meta-webserver \   <absolute-path>/poky/meta-oe/meta-webserver \  + <absolute-path>/poky/meta-oe/meta-networking \  + <absolute-path>/poky/meta-xilinx \ </font> </font> * Step 4: Edit ''build/conf/local.conf'' - set MACHINE and other things: * Step 4: Edit ''build/conf/local.conf'' - set MACHINE and other things: Oleg

0353-19-65E - SFE Plate, revision "E":

← Older revision Revision as of 01:20, 6 December 2013 (2 intermediate revisions not shown)Line 322: Line 322: === 0353-19-65E - SFE Plate, revision "E" === === 0353-19-65E - SFE Plate, revision "E" === {{Cad4|0353-19-65E}} {{Cad4|0353-19-65E}}  +  +----  +  +=== 0353-19-65F - SFE Plate, revision "F" ===  +{{Cad4|0353-19-65F}} ---- ---- Line 332: Line 337: === 0353-19-651A - Sensor ring, Revision "A" === === 0353-19-651A - Sensor ring, Revision "A" === {{Cad4|0353-19-651A}} {{Cad4|0353-19-651A}}  +  +----  +  +=== 0353-19-651B - Sensor ring, Revision "B" ===  +{{Cad4|0353-19-651B}} ---- ---- Andrey.filippov

uploaded "[[File:0353-19-651B.stp.tar.gz]]"

Andrey.filippov

← Older revision Revision as of 01:15, 6 December 2013 Line 1: Line 1: - +== Licensing ==  +{{CERN OHLv1.1 }} Andrey.filippov

uploaded "[[File:0353-19-651B.dxf.tar.gz]]"

Andrey.filippov

← Older revision Revision as of 22:59, 4 December 2013 (One intermediate revision not shown)Line 245: Line 245: ==<font color='blue'>RTC config example in DTS</font>== ==<font color='blue'>RTC config example in DTS</font>== http://www.denx.de/wiki/DULG/Appendix http://www.denx.de/wiki/DULG/Appendix  +  +==<font color='blue'>Program bitstream from Linux</font>==  +<font size='2'>  +* PL status (1=programmed, 0=not):  + cat /sys/devices/amba.0/f8007000.ps7-dev-cfg/prog_done  +* Program (the driver understands both *.bit and *.bit.bin)  + cat test.bit > /dev/xdevcfg  +</font> Oleg

← Older revision Revision as of 01:41, 4 December 2013 Line 1: Line 1: ==Presentations== ==Presentations==  +  +===2013/10/08 UofU Computer Engineering Jr Seminar===  +* Presentation:  +**[http://wiki.elphel.com/images/e/e7/UU_CompEngineerJrSeminar_2013.odp Open Hardware Cameras] (36MB)  +* Sound:  +**[http://wiki.elphel.com/images/c/c7/UUCompEnginJrSem2013_Olga.wav UUCompEnginJrSem2013_Olga.wav] (37MB)  +<!--**[[Media:UUCompEnginJrSem2013_Olga.wav|UUCompEnginJrSem2013_Olga.wav]] (37MB)--> ===2012/10/22 UofU SCI ImageLunch=== ===2012/10/22 UofU SCI ImageLunch=== Olga

uploaded "[[File:UUCompEnginJrSem2013 Olga.wav]]" Presentation Audio for University of Utah class "Computer Engineering Junior Seminar"; was presented on October 8th, 2013

Olga

uploaded "[[File:UU CompEngineerJrSeminar 2013.odp]]" Presentation Slides for University of Utah class "Computer Engineering Junior Seminar"; was presented on October 8th, 2013

Olga

Lenses:

← Older revision Revision as of 20:46, 3 December 2013 (One intermediate revision not shown)Line 129: Line 129: | [[Image:Vd-4 5mm-F1 8-m12-adapters.jpeg|thumb|left|190px]]<br>   | [[Image:Vd-4 5mm-F1 8-m12-adapters.jpeg|thumb|left|190px]]<br>   |   |   -'''Vision Dimension'''<br>  +'''Evetar Lens'''<br>   -EFL=4.5mm, F/1.8, with IR cut-off filter. <br>  +N125B04518W EFL=4.5mm, F/1.8, with IR cut-off filter. <br>   Barrel threaded M12 + M12 adapter for C-Mount (price includes assembly)<br>   Barrel threaded M12 + M12 adapter for C-Mount (price includes assembly)<br>   Line 159: Line 159: | [[Image:T H2Z0414C-MP.jpg|thumb|left|120px]] | [[Image:T H2Z0414C-MP.jpg|thumb|left|120px]] |   |   -'''Computar Vari-focal Lens'''<br>  +'''Computar Vari-focal Lens, Megapixel'''<br>   4-8mm, F/1.4, Manual Iris, Vari-Focal, C-Mount, Megapixel   4-8mm, F/1.4, Manual Iris, Vari-Focal, C-Mount, Megapixel   Line 172: Line 172: | [[Image:2202161 big.jpg|thumb|left|190px]]<br>   | [[Image:2202161 big.jpg|thumb|left|190px]]<br>   |   |   -'''Computar Vari-focal Lens'''  +'''Computar Vari-focal Lens, 3MPix'''   4.5-13.2mm, F/1.8, Manual Iris, Vari-Focal, CS-Mount, 3 MPix, Day/Night, IR   4.5-13.2mm, F/1.8, Manual Iris, Vari-Focal, CS-Mount, 3 MPix, Day/Night, IR   Line 183: Line 183: |} |}  +  +<br>  +  +  +'''Computar Vari-focal Lens, 5 MPix'''  +  +1/1.8" 4.5-13.2mm F1.8 Manual Iris Vari-Focal Lens CS-Mount, 5 MPix, Day/Night, IR  +  +<br>  +  +Product Code: E3Z4518CS-MPIR <br>  +  +Price: $275<br>  + <br>   <br>   Olga

← Older revision Revision as of 19:54, 3 December 2013 Line 159: Line 159: | [[Image:T H2Z0414C-MP.jpg|thumb|left|120px]] | [[Image:T H2Z0414C-MP.jpg|thumb|left|120px]] |   |   -'''Computar Vari-focal Lens'''<br>  +'''Computar Vari-focal Lens, Megapixel'''<br>   4-8mm, F/1.4, Manual Iris, Vari-Focal, C-Mount, Megapixel   4-8mm, F/1.4, Manual Iris, Vari-Focal, C-Mount, Megapixel   Line 172: Line 172: | [[Image:2202161 big.jpg|thumb|left|190px]]<br>   | [[Image:2202161 big.jpg|thumb|left|190px]]<br>   |   |   -'''Computar Vari-focal Lens'''  +'''Computar Vari-focal Lens, 3MPix'''   4.5-13.2mm, F/1.8, Manual Iris, Vari-Focal, CS-Mount, 3 MPix, Day/Night, IR   4.5-13.2mm, F/1.8, Manual Iris, Vari-Focal, CS-Mount, 3 MPix, Day/Night, IR   Line 183: Line 183: |} |}  +  +<br>  +  +  +'''Computar Vari-focal Lens, 5 MPix'''  +  +1/1.8" 4.5-13.2mm F1.8 Manual Iris Vari-Focal Lens CS-Mount, 5 MPix, Day/Night, IR  +  +<br>  +  +Product Code: E3Z4518CS-MPIR <br>  +  +Price: $275<br>  + <br>   <br>   Olga

← Older revision Revision as of 23:42, 23 November 2013 (One intermediate revision not shown)Line 68: Line 68: ====Notes==== ====Notes==== <font color="red"> <font color="red"> -* Is there a way to build it by running ''bitbake elphel393'' (elphel393 is the name of the ramdisk core image - currently coincides with the name of the MACHINE)+* Is there a way to build it by running ''bitbake core-image-elphel393'' </font> </font> Line 92: Line 92: </font> </font> <font color="red"> <font color="red"> -* When linux-xlnx is 'clean' it is built with the ramdisk.image.gz by ''bitbake elphel393'', however the boot.bin does not, why?+* When linux-xlnx is 'clean' it is built with the ramdisk.image.gz by ''bitbake core-image-elphel393'', however the boot.bin does not, why? </font> </font> Line 99: Line 99: ==<font color="blue">Build ramdisk.image.gz</font>== ==<font color="blue">Build ramdisk.image.gz</font>== <font size='2'> <font size='2'> -  bitbake elphel393+  bitbake core-image-elphel393 </font> </font> ====Output==== ====Output==== Line 160: Line 160: ==<font color="blue">Build everything all together</font>== ==<font color="blue">Build everything all together</font>== <font size='2'> <font size='2'> -  bitbake ezynq-u-boot linux-xlnx elphel393+  bitbake ezynq-u-boot linux-xlnx core-image-elphel393 </font> </font> Line 242: Line 242: **'''(Is there a better solution for kubuntu 13.04? in kubuntu 12.10 there is no such error - or is it just newer version?)''' To fix the '''ERROR'''="'''Could not inherit file classes/vala.bbclass'''" in bitbake copy vala.bbclass from oe-core? or delete the conflicting recipes (2?)? **'''(Is there a better solution for kubuntu 13.04? in kubuntu 12.10 there is no such error - or is it just newer version?)''' To fix the '''ERROR'''="'''Could not inherit file classes/vala.bbclass'''" in bitbake copy vala.bbclass from oe-core? or delete the conflicting recipes (2?)? **'''(Is there a better solution for kubuntu 13.04? in kubuntu 12.10 there is no such error - or is it just newer version?)''' To fix the '''ERROR'''="'''Failed to parse krb5_1.11.3.bb'''" in bitbake delete the directory ''meta-oe/meta-oe/recipes-connectivity/krb5'' **'''(Is there a better solution for kubuntu 13.04? in kubuntu 12.10 there is no such error - or is it just newer version?)''' To fix the '''ERROR'''="'''Failed to parse krb5_1.11.3.bb'''" in bitbake delete the directory ''meta-oe/meta-oe/recipes-connectivity/krb5''  +  +==<font color='blue'>RTC config example in DTS</font>==  +http://www.denx.de/wiki/DULG/Appendix Oleg