USB FPGA CODE

In compressor where there are many registers you can not drive all of them from 9 degrees - there will be interferience because of the ground bounce on the power lines, so I spread registers between 0,90,180,270.

Probably it is not a problem for USB as it is much smaller than compressor, but still it is better to be able to use several clocks, and they are already availbale for 125MHz.

So this is why it is better to put most of the logic in USB at 125 MHz, and only on the PHY side - 48MHz (after DCM)

Because from the external generator we allready use all outputs: Xtal is 20MHz - it goes to CPU 1 PLL (25 MHz) ->Ethernet PHY 1 PLL (125MHz) - SDRAM, compressor 1 PLL (6..48MHz) - sensor. We cannot rely on 48MHz as different sensor boards may need different clock speeds

It is still possinble to drive sensor from frequency divider from the 125MHz but it is more convinient to have it independent. Other option for USB - use only xtal 20Mhz that will not change and run DCM from 20MHz to make 48MHz.

clk0 is 120Mhz

It is, but with Theora it is 125 MHz and we will change it in configuration file, it will be 125, not 120. And it is also better not to tie fixed 48MHz for USB to this 120/125 to have some freedom in running different system frequencies. The best source for USB will be 20Mhz->DCM->48MHz

I think it is possble.but need test.

But this is a goal

You may use just 2 - 0 and 90, and then just put:

always @ (posedge clk90) 

always @ (negedge clk90)

Because now I don't remember if all 4 are actually present on chip.

Maybe it is just 0, 90, 270? or 0, 90, 180 - just don't remember.

Also the interface to the CPU shoul be consistent with the current one, and not use large address space - just

It is possible to use interrupts, yes. How many bits? 

We can add more - anyway date is read in in 32 bit words.

8 was selected fro vector interrupts, but now it is not used as there were some problems with ETRAX software. We should probably restore vector interrupt functionality as there are too many different sources for the interrupts now. Use INTA to put 8 bit on the bus.

interrupts no use state words?
I think beterr use state word register?

Now most are how they are just by historical reasons. There is already a mess, but it should be fixed from both sides - software driver and ISR, and FPGA.

But first we need to make sure that vector interrupts now work with ETRAX as expected, then modify the FPGA code and drivers to use it. I had vector interrupts even in model 303 camera, but later removed it having problem with it in software. Some problems were gone wiyth newer kernel but I haven't restored vector interrupts back.