Imaging solutions with Free Software & Open Hardware

Who's online

There are currently 0 users online.

[fpga] By dzhimiev: Unfortunately dzhimiev was too busy to leave any commit message

Elphel CVS logs - Mon, 06/26/2006 - 10:29
dzhimiev committed changes to the Elphel project fpga CVS:
Unfortunately dzhimiev was too busy to leave any commit message

[fpga] By dzhimiev: timestamp vhdl module

Elphel CVS logs - Mon, 06/26/2006 - 10:23
dzhimiev committed changes to the Elphel project fpga CVS:
timestamp vhdl module

[fpga] By baton75: New firmware with bugfixing.

Elphel CVS logs - Tue, 05/02/2006 - 23:16
baton75 committed changes to the Elphel project fpga CVS:
New firmware with bugfixing.

[fpga] By baton75: Add simple USB testbench.

Elphel CVS logs - Tue, 05/02/2006 - 23:14
baton75 committed changes to the Elphel project fpga CVS:
Add simple USB testbench.

[fpga] By baton75: Bigfix ioports.

Elphel CVS logs - Tue, 05/02/2006 - 23:13
baton75 committed changes to the Elphel project fpga CVS:
Bigfix ioports.

[fpga] By spectr_rain: fork 333 jpeg code with USB core

Elphel CVS logs - Tue, 04/25/2006 - 21:18
spectr_rain committed changes to the Elphel project fpga CVS:
fork 333 jpeg code with USB core

[fpga] By spectr_rain: fork 333 jpeg code with USB core

Elphel CVS logs - Tue, 04/25/2006 - 21:16
spectr_rain committed changes to the Elphel project fpga CVS:
fork 333 jpeg code with USB core

[fpga] By spectr_rain: fork 333 jpeg code with USB core

Elphel CVS logs - Tue, 04/25/2006 - 20:36
spectr_rain committed changes to the Elphel project fpga CVS:
fork 333 jpeg code with USB core

[fpga] By elphel: outputs from XIlinx tools running on the design

Elphel CVS logs - Thu, 03/17/2005 - 23:00
elphel committed changes to the Elphel project fpga CVS:
outputs from XIlinx tools running on the design

[fpga] By elphel: project file for Xilinx ISE

Elphel CVS logs - Thu, 03/17/2005 - 22:59
elphel committed changes to the Elphel project fpga CVS:
project file for Xilinx ISE

[fpga] By elphel: rev 03330026

Elphel CVS logs - Thu, 03/10/2005 - 22:40
elphel committed changes to the Elphel project fpga CVS:
rev 03330026

[fpga] By elphel: Cumulative bug fixes to FPGA rev 03330021.

Elphel CVS logs - Sat, 03/05/2005 - 16:56
elphel committed changes to the Elphel project fpga CVS:
Cumulative bug fixes to FPGA rev 03330021.

[fpga] By elphel: bug fix in mcontr_tok_rd.v

Elphel CVS logs - Wed, 02/23/2005 - 14:23
elphel committed changes to the Elphel project fpga CVS:
bug fix in mcontr_tok_rd.v

[fpga] By elphel: FPGA image - rev 0333001b

Elphel CVS logs - Sat, 02/19/2005 - 16:18
elphel committed changes to the Elphel project fpga CVS:
FPGA image - rev 0333001b

[fpga] By elphel: fixed bug that prepared all quantization tables the same (it was dicovered by color blocks in the decoder output, removed some already commented out code

Elphel CVS logs - Tue, 01/25/2005 - 18:14
elphel committed changes to the Elphel project fpga CVS:
fixed bug that prepared all quantization tables the same (it was dicovered by color blocks in the decoder output, removed some already commented out code

[fpga] By elphel: added more test output dump files (to compare with decoder) changed quantization values

Elphel CVS logs - Tue, 01/25/2005 - 18:11
elphel committed changes to the Elphel project fpga CVS:
added more test output dump files (to compare with decoder) changed quantization values

[fpga] By elphel: Changed some TIG (timing ignore) constraints to double cycle ones, added more of such (acually easin constraints)

Elphel CVS logs - Tue, 01/25/2005 - 18:08
elphel committed changes to the Elphel project fpga CVS:
Changed some TIG (timing ignore) constraints to double cycle ones, added more of such (acually easin constraints)

[fpga] By elphel: Swapped output bytes, changed Rev number and copyright dates

Elphel CVS logs - Tue, 01/25/2005 - 18:05
elphel committed changes to the Elphel project fpga CVS:
Swapped output bytes, changed Rev number and copyright dates

[fpga] By elphel: moved 2's complement -> {sign,abs} conversion on the output here from the module above

Elphel CVS logs - Tue, 01/25/2005 - 17:56
elphel committed changes to the Elphel project fpga CVS:
moved 2's complement -> {sign,abs} conversion on the output here from the module above

[fpga] By elphel: Two bugs were discovered and fixed while testing the output data with a standard decoder, both related to replacing the predicted value with one of the 3 neighbours (L, DL, D) if they are all present

Elphel CVS logs - Tue, 01/25/2005 - 17:52
elphel committed changes to the Elphel project fpga CVS:
Two bugs were discovered and fixed while testing the output data with a standard decoder, both related to replacing the predicted value with one of the 3 neighbours (L, DL, D) if they are all present

Pages

Subscribe to www3.elphel.com aggregator